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Parameter of an array of enumeration values breaks conditionals inside a generate block #1484
This was tested using the Verilator 4.016 release. When using a parameter that is an array of enumeration values inside an if (or case) condition of a generate block triggers the following errors:
When changing the array to be packed Verilator will throw only warnings; however the generate block does not evaluate the condition correctly. Attached is a test case that demonstrates this. The example simulates correctly with Incisive and synthesizes with Design Compiler. Icarus Verilog and Yosys unfortunately don't support this syntax.
Original Redmine Comment
Note #� is fixed in git, now this example fails with
This is because of a mistake in the provided source, it should be
(Note the tick). With that change this test passes.