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Implementing $rose and $fell #2148

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PeterMonsson opened this issue Jan 31, 2020 · 1 comment
Open

Implementing $rose and $fell #2148

PeterMonsson opened this issue Jan 31, 2020 · 1 comment
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@PeterMonsson
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@PeterMonsson PeterMonsson commented Jan 31, 2020

Hi,

I would like to take a stab at implementing $rose and $fell and I have 2 questions?

  1. What type of AST node should I use for these?
  2. How do I select the lowest bit of a vector/bit? is AstSelBit enough?

Best Regards
Peter

@PeterMonsson PeterMonsson added the new label Jan 31, 2020
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@wsnyder wsnyder commented Jan 31, 2020

  1. What type of AST node should I use for these?

You could either make a new AstRose/AstFell/AstStable/AstChanged, or given they are all handled extremely similar to AstPast, add inside AstPast a member variable of type VPastType enumeration which says which flavor.

  1. How do I select the lowest bit of a vector/bit? is AstSelBit enough?

At the point you convert these (probably V3Assert?) the AstSelBits will be AstSel, so you should make a AstSel if the nodep->width() > 1.

BTW note these in IEEE F.3.4.4:

  $rose(e,c)     ->   $past(b,1,1,c) !== 1 && b === 1, where b is the LSB of e.
  $fell(e,c)     ->   $past(b,1,1,c) !== 0 && b === 0, where b is the LSB of e.
  $stable(e,c)   ->   $past(e,1,1,c) === e.
  $changed(e,c)  ->   $past(e,1,1,c) !== e.

Verilator doesn't support expression 2 (which is 1 in above so that's ok). Add that too if you want (it would just be an if statement inside the $past flop).

Verilator also doesn't support the clock argument ("c"), either error out on that or add it too, it's the clocking expression when making the $past flop.

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