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Support arbitrary event expressions #2184

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dpetrisko opened this issue Mar 6, 2020 · 3 comments
Open

Support arbitrary event expressions #2184

dpetrisko opened this issue Mar 6, 2020 · 3 comments

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@dpetrisko
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@dpetrisko dpetrisko commented Mar 6, 2020

module foo
 (input clk_i
  , input reset_i
  , input freeze_i
  );

  always_ff @(negedge (reset_i | freeze_i))
    $display("Reset sequence finished");

endmodule

Result:

$ verilator --cc foo.v
%Error: foo.v:8: syntax error, unexpected '|', expecting ')'
%Error: Exiting due to 1 error(s)
%Error: Command Failed /usr/bin/verilator_bin --cc foo.v
module bar
 (input clk_i
  , input reset_i
  , input freeze_i
  );

  wire any_reset_li = reset_i | freeze_i;
  always_ff @(negedge any_reset_li)
    $display("Reset sequence finished");

endmodule

Passes fine, though. foo.v works fine in Synopsys VCS

@wsnyder

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@wsnyder wsnyder commented Mar 6, 2020

Verilator doesn't support expressions as sensitivity lists, as this is rare and hard to support in its full form it will be a while before this is fixed. It's on the list to fix, so closing this as a duplicate.

@wsnyder wsnyder closed this Mar 6, 2020
@dpetrisko

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@dpetrisko dpetrisko commented Mar 6, 2020

Sorry! Couldn’t find the duplicate!

@wsnyder

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@wsnyder wsnyder commented Mar 7, 2020

This is in our spreadsheet of work towards IEEE, but you're right there's no issue on it.

If you or someone wants to work on it, we would be glad to give guidance.

@wsnyder wsnyder reopened this Mar 7, 2020
@wsnyder wsnyder changed the title Combinational logic in always_ff sensitivity list Support arbitrary event expressions Mar 7, 2020
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