Join GitHub today
GitHub is home to over 40 million developers working together to host and review code, manage projects, and build software together.Sign up
I discovered that adding an '=' symbol to a verilog port causes verilator_bin to %Error without a useful message. Following is an example. I am not using the latest version of verilator, so I am not sure if it is has already been fixed.
Sorry for not creating a test and submitting it that way.