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Verilog-mode support for the `elsif directive #203

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veripoolbot opened this issue Jan 13, 2010 · 2 comments
Closed

Verilog-mode support for the `elsif directive #203

veripoolbot opened this issue Jan 13, 2010 · 2 comments
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@veripoolbot veripoolbot commented Jan 13, 2010


Author Name: Shankar Giri
Original Redmine Issue: 203 from https://www.veripool.org
Original Date: 2010-01-13
Original Assignee: Michael McNamara


Noticed that while ifdef, else and endif indents properly, elsif did not. Hence modified verilog-mode.el to support `elsif indentation. Patch attached.

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@veripoolbot veripoolbot commented Jan 13, 2010


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2010-01-13T11:44:32Z


Wow, surprised no one noticed that until now. Thanks for the patch, that always helps a lot. I'll let Mac apply it as it's his half.

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@veripoolbot veripoolbot commented Apr 10, 2010


Original Redmine Comment
Author Name: Michael McNamara
Original Date: 2010-04-10T22:57:33Z


Thanks, Shankar Giri!

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