Hi, I am doing intergration work with others that don't use verilog-mode, they complain to me that AUTOARG input and output port list is hard to use because several ports in one line, they perfer one line for each port as following:
could you add one option for this. Thanks for your help
Arhtas Jie Xiao
I have updated verilog-mode.el
(defun verilog-auto-arg-ports ...
(insert (verilog-sig-name (car sigs)) ","
(insert "\n") //my update for switch line
and it works as what I expect except one indent issue
i have fixed indent issue by
(setq sigs (cdr sigs)
space "")))) // from space " "
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