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Question: Intelligent tab / name completion for verilog-mode? #845
Author Name: Victor Hannak
As a heavy VHDL-mode user, I have grown quite accustomed to the "intelligent tab" functionality of VHDL-mode where it does name completion when the cursor is at the end of a string or inserts a tab otherwise. It's somewhat frustrating in verilog-mode to have to use a different keystroke (alt-tab) for name completion.
Is anyone aware of an implementation of "intelligent tab" for verilog-mode?