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Author Name: Leon Medpum
is this expected to work?
It doesn't seem to be documented in IEEE.1364-2005, but it is valid systemverilog (IEEE Std 1800™-2012 section 7.4.5)
here is a test program:
And the output:
The net->msb() returned is not an integer as expected. I am not sure if this syntax is supposed to be supported or not.
Original Redmine Comment
This is a side effect of 2001 parsing that it's better not to clean up. The documentation for ports already indicated this was for Verilog 1995 only. I did however commit making the docs a bit clearer and a test for this.