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Failure to correctly parse buses of concatenated bits #125

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veripoolbot opened this issue Jun 29, 2007 · 0 comments
Closed

Failure to correctly parse buses of concatenated bits #125

veripoolbot opened this issue Jun 29, 2007 · 0 comments
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@veripoolbot veripoolbot commented Jun 29, 2007


Author Name: Wilson Snyder (@wsnyder)
Original Redmine Issue: 125 from https://www.veripool.org
Original Date: 2007-06-29
Original Assignee: Wilson Snyder (@wsnyder)


This bug was cloned from Perl-RT, rt13462.

Email addresses have have been truncated.

Id: 	13462
Status: 	resolved
Left: 	0 min
Queue: 	Verilog-Perl
Owner: 	WSNYDER <wsnyder@>
Requestors: 	michael.parker@

Severity: 	Important
Broken in: 	2.316
X Attachments
bit_concatenation_TC.tar.gz

     * Wed Jun 29 04:46:45 2005 (692b) by

siglist.diff

     * Fri Jan 05 18:26:08 2007 (2.7k) by jetrull

Wed Jun 29 04:46:45 2005 guest - Ticket created

Subject: 	Failure to correctly parse buses of concatenated bits

Dist. name & version: Verilog-Perl-2.316
Perl version: 5.8.0
OS: Linux 2.4.21-27.0.2.ELsmp #1 SMP Wed Jan 12 23:35:44 EST 2005 i686 i686 i386 GNU/Linux

Description:

(See attached tarball for testcase files)

When reading in and writing out a Verilog netlist containing buses constructed from concatenated bits:

module another_block (B);
input@B;
block block_instance (
.A({B[1], B[0]})); <-------
endmodule

the following syntactic error is seen in the output:

module another_block (
B);
input@B;
block block_instance (.A(B[1] [0])); <------
endmodule

This 'B[0] [1]' statement is syntactically incorrect and causes several tools to report errors (or seg fault, in the case of Synopsys' dc_shell!).

This behaviour can be seen by running the attached 'testcase.pl' Perl script on the 'testcase_in.v' Verilog netlist. The observed output, 'testcase_out.v', is also attached.

Rgds,

Mike
[application/x-gzip-compressed 692b]
Message body not shown because it is too large or is not plain text.

Wed Jul 13 10:48:57 2005 WSNYDER - Taken

Wed Jul 13 10:53:03 2005 WSNYDER - Correspondence added

Sorry for the delay, I don't check the buglist often.

Currently the netlister is limited to simple signals in pin
interconnect, it will not work with any expressions.

The data structures and parsing to fix this are more work then I have at
the moment. Of course, I'd love a patch :) If you only want to have it
recognized and stored, you might be able to hack something together by
just modifying the parser.

Wed Jul 13 10:53:03 2005 WSNYDER - Status changed from 'new' to 'open'

Fri Jan 05 18:26:07 2007 jetrull - Correspondence added

From: 	jetrull@

I encountered this problem also. The attached patch fixed it for me.

Regards,
Jeff Trull

[text/x-patch 2.7k]
--- Verilog-Perl-2.361/SigParser.pm 2006-10-02 06:22:50.000000000 -0700
+++ Verilog-Perl-2.361-mrhack/SigParser.pm 2007-01-05 15:06:43.197437000 -0800
@@ -244,6 +244,7 @@
$self->{last_function} = undef;
$self->{last_task} = undef;
$self->{last_vectors} = "";
+ $self->{last_list} = ""; # store bracketed list
$self->{last_param} = "";
$self->{is_inst_ok} = 1;
$self->{is_pin_ok} = 0;
@@ -252,6 +253,7 @@
$self->{in_preproc_line} = -1;
$self->{in_celldefine} = 0;
$self->{in_vector} = 0;
+ $self->{in_list} = 0;
$self->{in_param_assign} = 0;
$self->{in_ports} = 0;
$self->{in_generate} = 0;
@@ -370,7 +372,7 @@
$self->{last_keyword} eq "begin" &&
$self->{last_operator} eq ":") {
$self->{last_keyword}="";
- $self->{last_symbols}=();
+ @{$self->{last_symbols}}=();
$self->{is_inst_ok} = 1;
}
}
@@ -448,10 +450,32 @@
$self->{in_ports} = 1;
1. Fallthru, more ; prep for next command is below
}
+ elsif ((($token eq ",") || ($token eq "}")) &&
+ $self->{in_list} && !$self->{in_vector}) {
+ # add whatever we just saw to the list
+ if ($self->{last_symbols}[0]) {
+ $self->{last_list} .= $self->{last_symbols}[0];
+ @{$self->{last_symbols}} = ();
+ }
+ if ($self->{last_vectors}) {
+ $self->{last_list} .= $self->{last_vectors};
+ $self->{last_vectors} = "";
+ }
+ # now either clean up or prepare to continue collecting the list
+ if ($token eq ",") {
+ $self->{last_list} .= ", ";
+ }
+ else {
+ # end of list
+ $self->{in_list} = 0;
+ $self->{last_list} .= "}";
+ }
+ }
elsif ($token eq "," || $token eq ";") {
if ($self->{is_pin_ok}
&& (defined $self->{last_symbols}[0]
|| $self->{last_vectors}
+ || $self->{last_list}
|| $token eq ",")
&& !$self->{bracket_level}) {
my $vec = $self->{last_vectors};
@@ -462,14 +486,16 @@
$namedports = 1 if defined $pin_name;
$pin_name ||= "pin" . $self->{is_pin_ok};
print "Gotapin $pin_name\n" if ($Debug);
+ my $pin_connection = $self->{last_list} || ($sym . $vec);
$self->pin ($pin_name,
- $sym . $vec,
+ $pin_connection,
$self->{is_pin_ok},
$namedports,
$self->{signed});
$self->{is_pin_ok}++; # moved to after pin call
$self->{pin_name} = undef;
$self->{last_vectors} = "";
+ $self->{last_list} = "";
@{$self->{last_symbols}} = ();
}
if ($token eq "," && $self->{is_pin_ok} && !$self->{paren_level}) {
@@ -553,6 +579,10 @@
$self->{last_vectors} = $self->{last_vectors} . ' ' . $token;
}
}
+ elsif ($token eq "{") {
+ $self->{in_list} = 1;
+ $self->{last_list} = "{";
+ }
elsif ($token eq "#") {
$self->{possibly_in_param_assign} = 1;
$self->{last_param} = $token;

Tue Jan 09 11:36:20 2007 WSNYDER - Correspondence added

Thanks! This patch will be in 2.370.

Tue Jan 09 11:36:23 2007 WSNYDER - Status changed from 'open' to 'resolved'

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