Verilog Perl does not parse widths correctly #153
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Original Redmine Comment Reply to original message on 26 Jul 2007: Net.pm line 35 couldn't cause that error. I presume it's line 67 ish? The parser definitely supports that syntax, however the Netlist:: packages don't know how to convert arithmetic expressions as that would require a full verilog evaluation engine, and it simply wouldn't work with things like parameters. They only tells you what the expressions are and you need to evaluate them yourself if you want a single numeric result. You can probably use my $width = eval($net->msb." - ".$self->lsb." + 1"); perhaps it should do that automatically if the expression is simple.... |
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Author Name: Wilson Snyder (@wsnyder)
Original Redmine Issue: 153 from https://www.veripool.org
Original Date: 2007-07-26
Original Assignee: Wilson Snyder (@wsnyder)
This bug was cloned from Perl-RT, rt28496.
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Thu Jul 26 18:24:58 2007 vananth@ - Ticket created
Fri Aug 03 11:45:26 2007 WSNYDER - TimeWorked changed from (no value) to '5'
Fri Aug 03 11:45:27 2007 WSNYDER - Status changed from 'new' to 'resolved'
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