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Parser bug in processing compiler directives in comments #524
Author Name: Ramana Mokkapati
Parser bug in processing compiler directive in comments.
See belowe more for detail and how to reproduce (in attachment)
Script to parse Verilog and output a new Verilog with all cells prefixed with "try_"
usage: test.pl bug.v output.v
Note output.v has "bbb" unprefixed becuase of the compiler directive inside the preceding comment line is not treated correctly.
Original Redmine Comment
It looks like your code is the one doing the searching for `ifndef, etc, as you're writing a raw parser that doesn't use Verilog::Preproc. If I turn on your verbose code I get
comment = // `ifdef XYZ
which is correct parsing by Verilog-Perl.
Perhaps I'm confused, if so please make very explicit as to what Verilog-Perl itself, not your script, is returning that you believe is incorrect.