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Virtual Interface modport issue #778

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veripoolbot opened this issue May 30, 2014 · 5 comments
Closed

Virtual Interface modport issue #778

veripoolbot opened this issue May 30, 2014 · 5 comments
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@veripoolbot veripoolbot commented May 30, 2014


Author Name: Jon Nall
Original Redmine Issue: 778 from https://www.veripool.org
Original Date: 2014-05-30
Original Assignee: Wilson Snyder (@wsnyder)


The following code (taken generally from IEEE 1800-2009 spec Section 25) results in an error due to using a modport in the virtual statement. I believe this code should parse without error.

Verilog-Perl generates: syntax error, unexpected '.', expecting IDENTIFIER or '=' or do or final

@interface foo;
wire a, b, c, d;
modport master (input a, b, output c, d);
modport slave (output a, b, input c, d);
endinterface : foo

virtual foo.master bar;
@

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@veripoolbot veripoolbot commented May 31, 2014


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-05-31T12:33:58Z


The data_type's yVIRTUAL rules are missing the ['.' modport_identifier].

Unfortunately three attempts of adding this all are making the grammar explode (because '.' can also be used to reference a member of an interface, and the grammar can't know the difference). Let me give it more thought.

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@veripoolbot veripoolbot commented May 31, 2014


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-05-31T13:49:07Z


Figured it out.

Fixed in git towards 3.404.

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@veripoolbot veripoolbot commented Jun 9, 2014


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-06-09T01:30:57Z


In 3.404.

@veripoolbot veripoolbot closed this Jun 9, 2014
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@veripoolbot veripoolbot commented Mar 11, 2015


Original Redmine Comment
Author Name: Jon Nall
Original Date: 2015-03-11T15:13:04Z


Wilson,
It seems this is still broken if the declaration is in a class. An example is below.

Thanks,
nall.

interface foo;

     wire a, b, c, d;
     modport master (input a, b, output c, d);
     modport slave (output a, b, input c, d);
endinterface : foo

class bar;
     virtual foo.master bar;
endclass

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@veripoolbot veripoolbot commented Mar 13, 2015


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2015-03-13T21:32:51Z


Classes fixed in git towards 3.409.

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