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Preprocessor redefinition warning message #846

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veripoolbot opened this issue Nov 12, 2014 · 4 comments
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Preprocessor redefinition warning message #846

veripoolbot opened this issue Nov 12, 2014 · 4 comments
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@veripoolbot veripoolbot commented Nov 12, 2014


Author Name: Adam Krolnik
Original Redmine Issue: 846 from https://www.veripool.org
Original Date: 2014-11-12
Original Assignee: Wilson Snyder (@wsnyder)


The existing message, while helpful, could be a bit more.

Currently:
%Warning: x.v:17: Redefining `CLK

It would be helpful show the prior and new values since they are already in the code:
%Warning: x.v:17: Redefining CLK to TOP.CLKIN; was `DSP_CLK

In Verilog/Getopt.pm
<529 warn "%Warning: ".$self->fileline().": Redefining `$token\n";

529 warn "%Warning: ".$self->fileline().": Redefining `$token to $value; was $oldval\n";

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@veripoolbot veripoolbot commented Nov 13, 2014


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-11-13T12:00:33Z


Some defines especially in UVM are crazy-large, like 1KB or larger, so I don't want to do this in general.

How about doing this only if the define values are say < 80 bytes or so and do not contain newlines?

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@veripoolbot veripoolbot commented Nov 13, 2014


Original Redmine Comment
Author Name: Adam Krolnik
Original Date: 2014-11-13T15:57:10Z


Yes, or maybe if they are large, show the prior definition location and the new.

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@veripoolbot veripoolbot commented Nov 14, 2014


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-11-14T00:21:33Z


In git towards 3.407.

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@veripoolbot veripoolbot commented Nov 15, 2014


Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2014-11-15T13:37:18Z


In 4.308.

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