diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index e61918e81b6baa..699d644a944d34 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -9288,6 +9288,34 @@ void SelectionDAGBuilder::populateCallLoweringInfo( Call->countOperandBundlesOfType(LLVMContext::OB_preallocated) != 0); } +/// Given the stackmap live variable `N`, search its sub-DAG and return all of +/// the constituent values that need to be reported in the stackmap table. +static std::vector findLiveConstituents(SelectionDAG &DAG, + const SDValue &N) { + std::vector V; + + switch (N.getOpcode()) { + case ISD::BUILD_PAIR: + case ISD::CONCAT_VECTORS: + case ISD::MERGE_VALUES: + case ISD::BUILD_VECTOR: + for (SDValue Op : N->op_values()) + V.push_back(Op); + break; + case ISD::INSERT_VECTOR_ELT: { + V = findLiveConstituents(DAG, N.getOperand(0)); + unsigned Idx = + cast(N.getOperand(2).getNode())->getZExtValue(); + V[Idx] = N.getOperand(1); + break; + } + default: + V.push_back(N); + } + + return V; +} + /// Add a stack map intrinsic call's live variable operands to a stackmap /// or patchpoint target node's operand list. /// @@ -9320,12 +9348,8 @@ static void addStackMapLiveVars(const CallBase &Call, unsigned StartIdx, Ops.push_back(DAG.getTargetFrameIndex(FI->getIndex(), Op.getValueType())); } else { // Otherwise emit a target independent node to be legalised. - if (Op.getOpcode() == ISD::MERGE_VALUES) { - for (unsigned J = 0; J < Op.getNumOperands(); J++) - Ops.push_back(Op.getOperand(J)); - } else { - Ops.push_back(Op); - } + for (SDValue &V : findLiveConstituents(DAG, Op)) + Ops.push_back(V); } Ops.push_back(DAG.getTargetConstant(StackMaps::NextLive, DL, MVT::i64)); } diff --git a/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll b/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll index 307946c4fd41bc..59a9948d4b3ffd 100644 --- a/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll +++ b/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll @@ -29,7 +29,7 @@ ; CHECK-NEXT: .long {{.*}} ; CHECK-NEXT: .short {{.*}} ; NumLiveVars -; CHECK-NEXT: .short 11 +; CHECK-NEXT: .short 16 ; LiveVar[NumLiveVars] ; LiveVar[0] ; CHECK-NEXT: .byte 1 @@ -165,6 +165,184 @@ ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 +; LiveVars[11] +; CHECK-NEXT: .byte 4 +; Locations[0] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 1 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 2 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 3 +; LiveVars[12] +; CHECK-NEXT: .byte 4 +; Locations[0] +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 +; CHECK-NEXT: .short {{.*}} +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; LiveVars[13] +; CHECK-NEXT: .byte 4 +; Locations[0] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 +; CHECK-NEXT: .short {{.*}} +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[2] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[3] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; LiveVars[14] +; CHECK-NEXT: .byte 8 +; Locations[0] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[2] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[3] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[4] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[5] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[6] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[7] +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 +; CHECK-NEXT: .short {{.*}} +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; LiveVars[14] +; CHECK-NEXT: .byte 4 +; Locations[0] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 1 +; Locations[2] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 2 +; Locations[3] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 3 @p32 = external global i8 addrspace(270)* @@ -181,6 +359,9 @@ entry: %ptr32 = load i8 addrspace(270)*, i8 addrspace(270)** @p32 %structreg1 = insertvalue %struct1 zeroinitializer, i32 %argc, 0 %structreg2 = insertvalue %struct2 zeroinitializer, i1 %i1reg, 0 + %arrayreg = insertvalue [4 x i32] zeroinitializer, i32 %argc, 0 + %vec = insertelement <4 x i32> zeroinitializer, i32 %argc, i32 1 + %bigvec = insertelement <8 x i32> zeroinitializer, i32 %argc, i32 7 call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void( i64 0, i32 0, @@ -206,6 +387,11 @@ entry: %struct1 zeroinitializer, %struct1 %structreg1, %struct2 zeroinitializer, - %struct2 %structreg2) + %struct2 %structreg2, + [4 x i32] [i32 0, i32 1, i32 2, i32 3], + [4 x i32] %arrayreg, + <4 x i32> %vec, + <8 x i32> %bigvec, + <4 x i8> ) ret i32 0 } diff --git a/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll b/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll index 2754b9158f1b9d..8f60c8ba5bedd5 100644 --- a/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll +++ b/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll @@ -29,7 +29,7 @@ ; CHECK-NEXT: .long {{.*}} ; CHECK-NEXT: .short {{.*}} ; NumLiveVars -; CHECK-NEXT: .short 13 +; CHECK-NEXT: .short 16 ; LiveVars[NumLiveVars] ; LiveVars[0] ; CHECK-NEXT: .byte 1 @@ -232,6 +232,124 @@ ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 +; LiveVars[13] +; CHECK-NEXT: .byte 4 +; Locations[0] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 +; CHECK-NEXT: .short {{.*}} +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[2] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[3] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; LiveVars[14] +; CHECK-NEXT: .byte 8 +; Locations[0] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[2] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[3] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[4] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[5] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[6] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[7] +; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 +; CHECK-NEXT: .short {{.*}} +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; LiveVars[14] +; CHECK-NEXT: .byte 4 +; Locations[0] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Locations[1] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 1 +; Locations[2] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 2 +; Locations[3] +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 3 @p32 = external global i8 addrspace(270)* @@ -249,6 +367,8 @@ entry: %structreg1 = insertvalue %struct1 zeroinitializer, i32 %argc, 0 %structreg2 = insertvalue %struct2 zeroinitializer, i1 %i1reg, 0 %arrayreg = insertvalue [4 x i32] zeroinitializer, i32 %argc, 0 + %vec = insertelement <4 x i32> zeroinitializer, i32 %argc, i32 1 + %bigvec = insertelement <8 x i32> zeroinitializer, i32 %argc, i32 7 call void (i64, i32, ...) @llvm.experimental.stackmap( i64 0, i32 0, @@ -274,6 +394,9 @@ entry: %struct2 zeroinitializer, %struct2 %structreg2, [4 x i32] [i32 0, i32 1, i32 2, i32 3], - [4 x i32] %arrayreg) + [4 x i32] %arrayreg, + <4 x i32> %vec, + <8 x i32> %bigvec, + <4 x i8> ) ret i32 0 }