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add MIPS architecture to GCC ethread atomics support

Gcc for MIPS supports immediate atomic gets and sets, and also
supports a working __sync_synchronize() for gcc 4.2 and greater.
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commit 6412564cadfb99c0c2a5089f07e4a0a02f13902c 1 parent a78b39a
Steve Vinoski authored

Showing 1 changed file with 7 additions and 2 deletions. Show diff stats Hide diff stats

  1. +7 2 erts/include/internal/gcc/ethr_atomic.h
9 erts/include/internal/gcc/ethr_atomic.h
@@ -31,7 +31,7 @@
31 31 #define ETHR_IMMED_ATOMIC_SET_GET_SAFE__ 0
32 32 /* Enable immediate read/write on platforms where we know it is safe */
33 33 #if defined(__i386__) || defined(__x86_64__) || defined(__sparc__) \
34   - || defined(__powerpc__) || defined(__ppc__)
  34 + || defined(__powerpc__) || defined(__ppc__) || defined(__mips__)
35 35 # undef ETHR_IMMED_ATOMIC_SET_GET_SAFE__
36 36 # define ETHR_IMMED_ATOMIC_SET_GET_SAFE__ 1
37 37 #endif
@@ -48,13 +48,18 @@ typedef struct {
48 48 * a noop on at least some platforms with some gcc versions.
49 49 * This has suposedly been fixed in some gcc version, but we
50 50 * don't know from which version. Therefore, we use the
51   - * workaround implemented below on all gcc versions.
  51 + * workaround implemented below on all gcc versions except
  52 + * for gcc 4.2 or above for MIPS, where it's been verified.
52 53 */
  54 +#if defined(__mips__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 2))
  55 +#define ETHR_MEMORY_BARRIER __sync_synchronize()
  56 +#else
53 57 #define ETHR_MEMORY_BARRIER \
54 58 do { \
55 59 volatile long x___ = 0; \
56 60 (void) __sync_val_compare_and_swap(&x___, (long) 0, (long) 1); \
57 61 } while (0)
  62 +#endif
58 63 #define ETHR_READ_DEPEND_MEMORY_BARRIER ETHR_MEMORY_BARRIER
59 64
60 65 #if defined(ETHR_TRY_INLINE_FUNCS) || defined(ETHR_AUX_IMPL__)

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