QA_Design Of Digital Circuits Using Verilog_feedback_p1

[kolliSuman]

Defect Description :
In the feedback page of "Design Of Digital Circuits Using Verilog" experiment,when we click on submit button with out entering the data in the corresponding fields an successul message is displayed on the screen instead an error message should be displayed on the screen as to enter the data in the corresponding fields

Actual Result :
In the feedback page of "Design Of Digital Circuits Using Verilog" experiment,when we click on submit button with out entering the data in the corresponding fields an successul message is displayed on the screen

Environment :
OS: Windows 7, Linux
Browsers: Firefox,Chrome
Bandwidth : 100Mbps
Hardware Configuration:8GBRAM ,
Processor:i5

Test Step Link:
https://github.com/Virtual-Labs/lsi-iiith/blob/master/test-cases/integration_test-cases/Design%20Of%20Digital%20Circuits%20Using%20Verilog/Design%20Of%20Digital%20Circuits%20Using%20Verilog_24_feedback_p1.org

Attachment:

[sadhanareddy]

issue is resolved now.

[BSravanthi]

Closed #14