QA_Design Of Digital Circuits Using Verilog_Usability_smk

[kolliSuman]

Defect Description :
In the landing page/home page of "Design Of Digital Circuits Using Verilog" experiment, the name of the experiment is not present in the screen instead the experiment name should be displayed on the screen at the top of the header options

Actual Result :
In the landing page/home page of "Design Of Digital Circuits Using Verilog" experiment, the name of the experiment is not present in the screen

Environment :
OS: Windows 7, Linux
Browsers: Firefox,Chrome
Bandwidth : 100Mbps
Hardware Configuration:8GBRAM ,
Processor:i5

Test Step Link:
https://github.com/Virtual-Labs/lsi-iiith/blob/master/test-cases/integration_test-cases/Design%20Of%20Digital%20Circuits%20Using%20Verilog/Design%20Of%20Digital%20Circuits%20Using%20Verilog_01_Usability_smk.org

Attachment:

[sadhanareddy]

issue is resolved now.

[BSravanthi]

Closed #18