mirrored from https://gitlab.winehq.org/wine/wine.git
-
Notifications
You must be signed in to change notification settings - Fork 1.1k
/
Copy pathsignal_x86_64.c
3348 lines (3049 loc) · 126 KB
/
signal_x86_64.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* x86-64 signal handling routines
*
* Copyright 1999, 2005 Alexandre Julliard
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
*/
#if 0
#pragma makedep unix
#endif
#ifdef __x86_64__
#include "config.h"
#include <assert.h>
#include <pthread.h>
#include <signal.h>
#include <stdlib.h>
#include <stdarg.h>
#include <stdio.h>
#include <sys/types.h>
#include <sys/mman.h>
#include <unistd.h>
#ifdef HAVE_MACHINE_SYSARCH_H
# include <machine/sysarch.h>
#endif
#ifdef HAVE_SYS_AUXV_H
# include <sys/auxv.h>
#endif
#ifdef HAVE_SYS_PARAM_H
# include <sys/param.h>
#endif
#ifdef HAVE_SYSCALL_H
# include <syscall.h>
#else
# ifdef HAVE_SYS_SYSCALL_H
# include <sys/syscall.h>
# endif
#endif
#ifdef HAVE_SYS_SIGNAL_H
# include <sys/signal.h>
#endif
#ifdef HAVE_SYS_UCONTEXT_H
# include <sys/ucontext.h>
#endif
#ifdef HAVE_LIBUNWIND
# define UNW_LOCAL_ONLY
# include <libunwind.h>
#endif
#ifdef __APPLE__
# include <mach/mach.h>
#endif
#define NONAMELESSUNION
#define NONAMELESSSTRUCT
#include "ntstatus.h"
#define WIN32_NO_STATUS
#include "windef.h"
#include "winternl.h"
#include "ddk/wdm.h"
#include "wine/list.h"
#include "wine/asm.h"
#include "unix_private.h"
#include "wine/debug.h"
WINE_DEFAULT_DEBUG_CHANNEL(unwind);
WINE_DECLARE_DEBUG_CHANNEL(seh);
/***********************************************************************
* signal context platform-specific definitions
*/
#ifdef linux
#include <asm/prctl.h>
static inline int arch_prctl( int func, void *ptr ) { return syscall( __NR_arch_prctl, func, ptr ); }
extern int CDECL alloc_fs_sel( int sel, void *base ) DECLSPEC_HIDDEN;
__ASM_GLOBAL_FUNC( alloc_fs_sel,
/* switch to 32-bit stack */
"pushq %rbx\n\t"
"pushq %rdi\n\t"
"movq %rsp,%rdi\n\t"
"movq %gs:0x8,%rsp\n\t" /* NtCurrentTeb()->Tib.StackBase */
"subl $0x10,%esp\n\t"
/* setup modify_ldt struct on 32-bit stack */
"movl %ecx,(%rsp)\n\t" /* entry_number */
"movl %edx,4(%rsp)\n\t" /* base */
"movl $~0,8(%rsp)\n\t" /* limit */
"movl $0x41,12(%rsp)\n\t" /* seg_32bit | usable */
/* invoke 32-bit syscall */
"movl %esp,%ebx\n\t"
"movl $0xf3,%eax\n\t" /* SYS_set_thread_area */
"int $0x80\n\t"
/* restore stack */
"movl (%rsp),%eax\n\t" /* entry_number */
"movq %rdi,%rsp\n\t"
"popq %rdi\n\t"
"popq %rbx\n\t"
"ret" );
#ifndef FP_XSTATE_MAGIC1
#define FP_XSTATE_MAGIC1 0x46505853
#endif
#define RAX_sig(context) ((context)->uc_mcontext.gregs[REG_RAX])
#define RBX_sig(context) ((context)->uc_mcontext.gregs[REG_RBX])
#define RCX_sig(context) ((context)->uc_mcontext.gregs[REG_RCX])
#define RDX_sig(context) ((context)->uc_mcontext.gregs[REG_RDX])
#define RSI_sig(context) ((context)->uc_mcontext.gregs[REG_RSI])
#define RDI_sig(context) ((context)->uc_mcontext.gregs[REG_RDI])
#define RBP_sig(context) ((context)->uc_mcontext.gregs[REG_RBP])
#define R8_sig(context) ((context)->uc_mcontext.gregs[REG_R8])
#define R9_sig(context) ((context)->uc_mcontext.gregs[REG_R9])
#define R10_sig(context) ((context)->uc_mcontext.gregs[REG_R10])
#define R11_sig(context) ((context)->uc_mcontext.gregs[REG_R11])
#define R12_sig(context) ((context)->uc_mcontext.gregs[REG_R12])
#define R13_sig(context) ((context)->uc_mcontext.gregs[REG_R13])
#define R14_sig(context) ((context)->uc_mcontext.gregs[REG_R14])
#define R15_sig(context) ((context)->uc_mcontext.gregs[REG_R15])
#define CS_sig(context) (*((WORD *)&(context)->uc_mcontext.gregs[REG_CSGSFS] + 0))
#define GS_sig(context) (*((WORD *)&(context)->uc_mcontext.gregs[REG_CSGSFS] + 1))
#define FS_sig(context) (*((WORD *)&(context)->uc_mcontext.gregs[REG_CSGSFS] + 2))
#define RSP_sig(context) ((context)->uc_mcontext.gregs[REG_RSP])
#define RIP_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
#define EFL_sig(context) ((context)->uc_mcontext.gregs[REG_EFL])
#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
#define FPU_sig(context) ((XMM_SAVE_AREA32 *)((context)->uc_mcontext.fpregs))
#define XState_sig(fpu) (((unsigned int *)fpu->Reserved4)[12] == FP_XSTATE_MAGIC1 ? (XSTATE *)(fpu + 1) : NULL)
#elif defined(__FreeBSD__) || defined (__FreeBSD_kernel__)
#include <machine/trap.h>
#define RAX_sig(context) ((context)->uc_mcontext.mc_rax)
#define RBX_sig(context) ((context)->uc_mcontext.mc_rbx)
#define RCX_sig(context) ((context)->uc_mcontext.mc_rcx)
#define RDX_sig(context) ((context)->uc_mcontext.mc_rdx)
#define RSI_sig(context) ((context)->uc_mcontext.mc_rsi)
#define RDI_sig(context) ((context)->uc_mcontext.mc_rdi)
#define RBP_sig(context) ((context)->uc_mcontext.mc_rbp)
#define R8_sig(context) ((context)->uc_mcontext.mc_r8)
#define R9_sig(context) ((context)->uc_mcontext.mc_r9)
#define R10_sig(context) ((context)->uc_mcontext.mc_r10)
#define R11_sig(context) ((context)->uc_mcontext.mc_r11)
#define R12_sig(context) ((context)->uc_mcontext.mc_r12)
#define R13_sig(context) ((context)->uc_mcontext.mc_r13)
#define R14_sig(context) ((context)->uc_mcontext.mc_r14)
#define R15_sig(context) ((context)->uc_mcontext.mc_r15)
#define CS_sig(context) ((context)->uc_mcontext.mc_cs)
#define DS_sig(context) ((context)->uc_mcontext.mc_ds)
#define ES_sig(context) ((context)->uc_mcontext.mc_es)
#define FS_sig(context) ((context)->uc_mcontext.mc_fs)
#define GS_sig(context) ((context)->uc_mcontext.mc_gs)
#define SS_sig(context) ((context)->uc_mcontext.mc_ss)
#define EFL_sig(context) ((context)->uc_mcontext.mc_rflags)
#define RIP_sig(context) ((context)->uc_mcontext.mc_rip)
#define RSP_sig(context) ((context)->uc_mcontext.mc_rsp)
#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
#define FPU_sig(context) ((XMM_SAVE_AREA32 *)((context)->uc_mcontext.mc_fpstate))
#define XState_sig(context) NULL
#elif defined(__NetBSD__)
#define RAX_sig(context) ((context)->uc_mcontext.__gregs[_REG_RAX])
#define RBX_sig(context) ((context)->uc_mcontext.__gregs[_REG_RBX])
#define RCX_sig(context) ((context)->uc_mcontext.__gregs[_REG_RCX])
#define RDX_sig(context) ((context)->uc_mcontext.__gregs[_REG_RDX])
#define RSI_sig(context) ((context)->uc_mcontext.__gregs[_REG_RSI])
#define RDI_sig(context) ((context)->uc_mcontext.__gregs[_REG_RDI])
#define RBP_sig(context) ((context)->uc_mcontext.__gregs[_REG_RBP])
#define R8_sig(context) ((context)->uc_mcontext.__gregs[_REG_R8])
#define R9_sig(context) ((context)->uc_mcontext.__gregs[_REG_R9])
#define R10_sig(context) ((context)->uc_mcontext.__gregs[_REG_R10])
#define R11_sig(context) ((context)->uc_mcontext.__gregs[_REG_R11])
#define R12_sig(context) ((context)->uc_mcontext.__gregs[_REG_R12])
#define R13_sig(context) ((context)->uc_mcontext.__gregs[_REG_R13])
#define R14_sig(context) ((context)->uc_mcontext.__gregs[_REG_R14])
#define R15_sig(context) ((context)->uc_mcontext.__gregs[_REG_R15])
#define CS_sig(context) ((context)->uc_mcontext.__gregs[_REG_CS])
#define DS_sig(context) ((context)->uc_mcontext.__gregs[_REG_DS])
#define ES_sig(context) ((context)->uc_mcontext.__gregs[_REG_ES])
#define FS_sig(context) ((context)->uc_mcontext.__gregs[_REG_FS])
#define GS_sig(context) ((context)->uc_mcontext.__gregs[_REG_GS])
#define SS_sig(context) ((context)->uc_mcontext.__gregs[_REG_SS])
#define EFL_sig(context) ((context)->uc_mcontext.__gregs[_REG_RFL])
#define RIP_sig(context) (*((unsigned long*)&(context)->uc_mcontext.__gregs[_REG_RIP]))
#define RSP_sig(context) (*((unsigned long*)&(context)->uc_mcontext.__gregs[_REG_URSP]))
#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
#define FPU_sig(context) ((XMM_SAVE_AREA32 *)((context)->uc_mcontext.__fpregs))
#define XState_sig(context) NULL
#elif defined (__APPLE__)
#define RAX_sig(context) ((context)->uc_mcontext->__ss.__rax)
#define RBX_sig(context) ((context)->uc_mcontext->__ss.__rbx)
#define RCX_sig(context) ((context)->uc_mcontext->__ss.__rcx)
#define RDX_sig(context) ((context)->uc_mcontext->__ss.__rdx)
#define RSI_sig(context) ((context)->uc_mcontext->__ss.__rsi)
#define RDI_sig(context) ((context)->uc_mcontext->__ss.__rdi)
#define RBP_sig(context) ((context)->uc_mcontext->__ss.__rbp)
#define R8_sig(context) ((context)->uc_mcontext->__ss.__r8)
#define R9_sig(context) ((context)->uc_mcontext->__ss.__r9)
#define R10_sig(context) ((context)->uc_mcontext->__ss.__r10)
#define R11_sig(context) ((context)->uc_mcontext->__ss.__r11)
#define R12_sig(context) ((context)->uc_mcontext->__ss.__r12)
#define R13_sig(context) ((context)->uc_mcontext->__ss.__r13)
#define R14_sig(context) ((context)->uc_mcontext->__ss.__r14)
#define R15_sig(context) ((context)->uc_mcontext->__ss.__r15)
#define CS_sig(context) ((context)->uc_mcontext->__ss.__cs)
#define FS_sig(context) ((context)->uc_mcontext->__ss.__fs)
#define GS_sig(context) ((context)->uc_mcontext->__ss.__gs)
#define EFL_sig(context) ((context)->uc_mcontext->__ss.__rflags)
#define RIP_sig(context) ((context)->uc_mcontext->__ss.__rip)
#define RSP_sig(context) ((context)->uc_mcontext->__ss.__rsp)
#define TRAP_sig(context) ((context)->uc_mcontext->__es.__trapno)
#define ERROR_sig(context) ((context)->uc_mcontext->__es.__err)
#define FPU_sig(context) ((XMM_SAVE_AREA32 *)&(context)->uc_mcontext->__fs.__fpu_fcw)
#define XState_sig(context) NULL
#else
#error You must define the signal context functions for your platform
#endif
enum i386_trap_code
{
#if defined(__FreeBSD__) || defined (__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__)
TRAP_x86_DIVIDE = T_DIVIDE, /* Division by zero exception */
TRAP_x86_TRCTRAP = T_TRCTRAP, /* Single-step exception */
TRAP_x86_NMI = T_NMI, /* NMI interrupt */
TRAP_x86_BPTFLT = T_BPTFLT, /* Breakpoint exception */
TRAP_x86_OFLOW = T_OFLOW, /* Overflow exception */
TRAP_x86_BOUND = T_BOUND, /* Bound range exception */
TRAP_x86_PRIVINFLT = T_PRIVINFLT, /* Invalid opcode exception */
TRAP_x86_DNA = T_DNA, /* Device not available exception */
TRAP_x86_DOUBLEFLT = T_DOUBLEFLT, /* Double fault exception */
TRAP_x86_FPOPFLT = T_FPOPFLT, /* Coprocessor segment overrun */
TRAP_x86_TSSFLT = T_TSSFLT, /* Invalid TSS exception */
TRAP_x86_SEGNPFLT = T_SEGNPFLT, /* Segment not present exception */
TRAP_x86_STKFLT = T_STKFLT, /* Stack fault */
TRAP_x86_PROTFLT = T_PROTFLT, /* General protection fault */
TRAP_x86_PAGEFLT = T_PAGEFLT, /* Page fault */
TRAP_x86_ARITHTRAP = T_ARITHTRAP, /* Floating point exception */
TRAP_x86_ALIGNFLT = T_ALIGNFLT, /* Alignment check exception */
TRAP_x86_MCHK = T_MCHK, /* Machine check exception */
TRAP_x86_CACHEFLT = T_XMMFLT /* Cache flush exception */
#else
TRAP_x86_DIVIDE = 0, /* Division by zero exception */
TRAP_x86_TRCTRAP = 1, /* Single-step exception */
TRAP_x86_NMI = 2, /* NMI interrupt */
TRAP_x86_BPTFLT = 3, /* Breakpoint exception */
TRAP_x86_OFLOW = 4, /* Overflow exception */
TRAP_x86_BOUND = 5, /* Bound range exception */
TRAP_x86_PRIVINFLT = 6, /* Invalid opcode exception */
TRAP_x86_DNA = 7, /* Device not available exception */
TRAP_x86_DOUBLEFLT = 8, /* Double fault exception */
TRAP_x86_FPOPFLT = 9, /* Coprocessor segment overrun */
TRAP_x86_TSSFLT = 10, /* Invalid TSS exception */
TRAP_x86_SEGNPFLT = 11, /* Segment not present exception */
TRAP_x86_STKFLT = 12, /* Stack fault */
TRAP_x86_PROTFLT = 13, /* General protection fault */
TRAP_x86_PAGEFLT = 14, /* Page fault */
TRAP_x86_ARITHTRAP = 16, /* Floating point exception */
TRAP_x86_ALIGNFLT = 17, /* Alignment check exception */
TRAP_x86_MCHK = 18, /* Machine check exception */
TRAP_x86_CACHEFLT = 19 /* Cache flush exception */
#endif
};
/* stack layout when calling an exception raise function */
struct stack_layout
{
CONTEXT context;
CONTEXT_EX context_ex;
EXCEPTION_RECORD rec;
ULONG64 align;
char xstate[0]; /* If xstate is present it is allocated
* dynamically to provide 64 byte alignment. */
};
C_ASSERT((offsetof(struct stack_layout, xstate) == sizeof(struct stack_layout)));
C_ASSERT( sizeof(XSTATE) == 0x140 );
C_ASSERT( sizeof(struct stack_layout) == 0x590 ); /* Should match the size in call_user_exception_dispatcher(). */
/* flags to control the behavior of the syscall dispatcher */
#define SYSCALL_HAVE_XSAVE 1
#define SYSCALL_HAVE_XSAVEC 2
#define SYSCALL_HAVE_PTHREAD_TEB 4
#define SYSCALL_HAVE_WRFSGSBASE 8
static unsigned int syscall_flags;
/* stack layout when calling an user apc function.
* FIXME: match Windows ABI. */
struct apc_stack_layout
{
ULONG64 save_regs[4];
void *func;
ULONG64 align;
CONTEXT context;
ULONG64 rbp;
ULONG64 rip;
};
struct syscall_frame
{
ULONG64 rax; /* 0000 */
ULONG64 rbx; /* 0008 */
ULONG64 rcx; /* 0010 */
ULONG64 rdx; /* 0018 */
ULONG64 rsi; /* 0020 */
ULONG64 rdi; /* 0028 */
ULONG64 r8; /* 0030 */
ULONG64 r9; /* 0038 */
ULONG64 r10; /* 0040 */
ULONG64 r11; /* 0048 */
ULONG64 r12; /* 0050 */
ULONG64 r13; /* 0058 */
ULONG64 r14; /* 0060 */
ULONG64 r15; /* 0068 */
ULONG64 rip; /* 0070 */
WORD cs; /* 0078 */
WORD ds; /* 007a */
WORD es; /* 007c */
WORD fs; /* 007e */
ULONG64 eflags; /* 0080 */
ULONG64 rsp; /* 0088 */
WORD ss; /* 0090 */
WORD gs; /* 0092 */
DWORD restore_flags; /* 0094 */
ULONG64 rbp; /* 0098 */
struct syscall_frame *prev_frame; /* 00a0 */
SYSTEM_SERVICE_TABLE *syscall_table; /* 00a8 */
DWORD syscall_flags; /* 00b0 */
DWORD align[3]; /* 00b4 */
XMM_SAVE_AREA32 xsave; /* 00c0 */
DECLSPEC_ALIGN(64) XSTATE xstate; /* 02c0 */
};
C_ASSERT( sizeof( struct syscall_frame ) == 0x400);
struct amd64_thread_data
{
DWORD_PTR dr0; /* 02f0 debug registers */
DWORD_PTR dr1; /* 02f8 */
DWORD_PTR dr2; /* 0300 */
DWORD_PTR dr3; /* 0308 */
DWORD_PTR dr6; /* 0310 */
DWORD_PTR dr7; /* 0318 */
void *exit_frame; /* 0320 exit frame pointer */
struct syscall_frame *syscall_frame; /* 0328 syscall frame pointer */
void *pthread_teb; /* 0330 thread data for pthread */
};
C_ASSERT( sizeof(struct amd64_thread_data) <= sizeof(((struct ntdll_thread_data *)0)->cpu_data) );
C_ASSERT( offsetof( TEB, GdiTebBatch ) + offsetof( struct amd64_thread_data, exit_frame ) == 0x320 );
C_ASSERT( offsetof( TEB, GdiTebBatch ) + offsetof( struct amd64_thread_data, syscall_frame ) == 0x328 );
C_ASSERT( offsetof( TEB, GdiTebBatch ) + offsetof( struct amd64_thread_data, pthread_teb ) == 0x330 );
static inline struct amd64_thread_data *amd64_thread_data(void)
{
return (struct amd64_thread_data *)ntdll_get_thread_data()->cpu_data;
}
static BOOL is_inside_syscall( const ucontext_t *sigcontext )
{
return ((char *)RSP_sig(sigcontext) >= (char *)ntdll_get_thread_data()->kernel_stack &&
(char *)RSP_sig(sigcontext) <= (char *)amd64_thread_data()->syscall_frame);
}
struct xcontext
{
CONTEXT c;
CONTEXT_EX c_ex;
ULONG64 host_compaction_mask;
};
extern BOOL xstate_compaction_enabled DECLSPEC_HIDDEN;
static inline XSTATE *xstate_from_context( const CONTEXT *context )
{
CONTEXT_EX *xctx = (CONTEXT_EX *)(context + 1);
if ((context->ContextFlags & CONTEXT_XSTATE) != CONTEXT_XSTATE) return NULL;
return (XSTATE *)((char *)xctx + xctx->XState.Offset);
}
static inline void context_init_xstate( CONTEXT *context, void *xstate_buffer )
{
CONTEXT_EX *xctx;
xctx = (CONTEXT_EX *)(context + 1);
xctx->Legacy.Length = sizeof(CONTEXT);
xctx->Legacy.Offset = -(LONG)sizeof(CONTEXT);
xctx->XState.Length = sizeof(XSTATE);
xctx->XState.Offset = (BYTE *)xstate_buffer - (BYTE *)xctx;
xctx->All.Length = sizeof(CONTEXT) + xctx->XState.Offset + xctx->XState.Length;
xctx->All.Offset = -(LONG)sizeof(CONTEXT);
context->ContextFlags |= CONTEXT_XSTATE;
}
static USHORT cs32_sel; /* selector for %cs in 32-bit mode */
static USHORT cs64_sel; /* selector for %cs in 64-bit mode */
static USHORT ds64_sel; /* selector for %ds/%es/%ss in 64-bit mode */
static USHORT fs32_sel; /* selector for %fs in 32-bit mode */
/***********************************************************************
* Definitions for Dwarf unwind tables
*/
enum dwarf_call_frame_info
{
DW_CFA_advance_loc = 0x40,
DW_CFA_offset = 0x80,
DW_CFA_restore = 0xc0,
DW_CFA_nop = 0x00,
DW_CFA_set_loc = 0x01,
DW_CFA_advance_loc1 = 0x02,
DW_CFA_advance_loc2 = 0x03,
DW_CFA_advance_loc4 = 0x04,
DW_CFA_offset_extended = 0x05,
DW_CFA_restore_extended = 0x06,
DW_CFA_undefined = 0x07,
DW_CFA_same_value = 0x08,
DW_CFA_register = 0x09,
DW_CFA_remember_state = 0x0a,
DW_CFA_restore_state = 0x0b,
DW_CFA_def_cfa = 0x0c,
DW_CFA_def_cfa_register = 0x0d,
DW_CFA_def_cfa_offset = 0x0e,
DW_CFA_def_cfa_expression = 0x0f,
DW_CFA_expression = 0x10,
DW_CFA_offset_extended_sf = 0x11,
DW_CFA_def_cfa_sf = 0x12,
DW_CFA_def_cfa_offset_sf = 0x13,
DW_CFA_val_offset = 0x14,
DW_CFA_val_offset_sf = 0x15,
DW_CFA_val_expression = 0x16,
};
enum dwarf_operation
{
DW_OP_addr = 0x03,
DW_OP_deref = 0x06,
DW_OP_const1u = 0x08,
DW_OP_const1s = 0x09,
DW_OP_const2u = 0x0a,
DW_OP_const2s = 0x0b,
DW_OP_const4u = 0x0c,
DW_OP_const4s = 0x0d,
DW_OP_const8u = 0x0e,
DW_OP_const8s = 0x0f,
DW_OP_constu = 0x10,
DW_OP_consts = 0x11,
DW_OP_dup = 0x12,
DW_OP_drop = 0x13,
DW_OP_over = 0x14,
DW_OP_pick = 0x15,
DW_OP_swap = 0x16,
DW_OP_rot = 0x17,
DW_OP_xderef = 0x18,
DW_OP_abs = 0x19,
DW_OP_and = 0x1a,
DW_OP_div = 0x1b,
DW_OP_minus = 0x1c,
DW_OP_mod = 0x1d,
DW_OP_mul = 0x1e,
DW_OP_neg = 0x1f,
DW_OP_not = 0x20,
DW_OP_or = 0x21,
DW_OP_plus = 0x22,
DW_OP_plus_uconst = 0x23,
DW_OP_shl = 0x24,
DW_OP_shr = 0x25,
DW_OP_shra = 0x26,
DW_OP_xor = 0x27,
DW_OP_bra = 0x28,
DW_OP_eq = 0x29,
DW_OP_ge = 0x2a,
DW_OP_gt = 0x2b,
DW_OP_le = 0x2c,
DW_OP_lt = 0x2d,
DW_OP_ne = 0x2e,
DW_OP_skip = 0x2f,
DW_OP_lit0 = 0x30,
DW_OP_lit1 = 0x31,
DW_OP_lit2 = 0x32,
DW_OP_lit3 = 0x33,
DW_OP_lit4 = 0x34,
DW_OP_lit5 = 0x35,
DW_OP_lit6 = 0x36,
DW_OP_lit7 = 0x37,
DW_OP_lit8 = 0x38,
DW_OP_lit9 = 0x39,
DW_OP_lit10 = 0x3a,
DW_OP_lit11 = 0x3b,
DW_OP_lit12 = 0x3c,
DW_OP_lit13 = 0x3d,
DW_OP_lit14 = 0x3e,
DW_OP_lit15 = 0x3f,
DW_OP_lit16 = 0x40,
DW_OP_lit17 = 0x41,
DW_OP_lit18 = 0x42,
DW_OP_lit19 = 0x43,
DW_OP_lit20 = 0x44,
DW_OP_lit21 = 0x45,
DW_OP_lit22 = 0x46,
DW_OP_lit23 = 0x47,
DW_OP_lit24 = 0x48,
DW_OP_lit25 = 0x49,
DW_OP_lit26 = 0x4a,
DW_OP_lit27 = 0x4b,
DW_OP_lit28 = 0x4c,
DW_OP_lit29 = 0x4d,
DW_OP_lit30 = 0x4e,
DW_OP_lit31 = 0x4f,
DW_OP_reg0 = 0x50,
DW_OP_reg1 = 0x51,
DW_OP_reg2 = 0x52,
DW_OP_reg3 = 0x53,
DW_OP_reg4 = 0x54,
DW_OP_reg5 = 0x55,
DW_OP_reg6 = 0x56,
DW_OP_reg7 = 0x57,
DW_OP_reg8 = 0x58,
DW_OP_reg9 = 0x59,
DW_OP_reg10 = 0x5a,
DW_OP_reg11 = 0x5b,
DW_OP_reg12 = 0x5c,
DW_OP_reg13 = 0x5d,
DW_OP_reg14 = 0x5e,
DW_OP_reg15 = 0x5f,
DW_OP_reg16 = 0x60,
DW_OP_reg17 = 0x61,
DW_OP_reg18 = 0x62,
DW_OP_reg19 = 0x63,
DW_OP_reg20 = 0x64,
DW_OP_reg21 = 0x65,
DW_OP_reg22 = 0x66,
DW_OP_reg23 = 0x67,
DW_OP_reg24 = 0x68,
DW_OP_reg25 = 0x69,
DW_OP_reg26 = 0x6a,
DW_OP_reg27 = 0x6b,
DW_OP_reg28 = 0x6c,
DW_OP_reg29 = 0x6d,
DW_OP_reg30 = 0x6e,
DW_OP_reg31 = 0x6f,
DW_OP_breg0 = 0x70,
DW_OP_breg1 = 0x71,
DW_OP_breg2 = 0x72,
DW_OP_breg3 = 0x73,
DW_OP_breg4 = 0x74,
DW_OP_breg5 = 0x75,
DW_OP_breg6 = 0x76,
DW_OP_breg7 = 0x77,
DW_OP_breg8 = 0x78,
DW_OP_breg9 = 0x79,
DW_OP_breg10 = 0x7a,
DW_OP_breg11 = 0x7b,
DW_OP_breg12 = 0x7c,
DW_OP_breg13 = 0x7d,
DW_OP_breg14 = 0x7e,
DW_OP_breg15 = 0x7f,
DW_OP_breg16 = 0x80,
DW_OP_breg17 = 0x81,
DW_OP_breg18 = 0x82,
DW_OP_breg19 = 0x83,
DW_OP_breg20 = 0x84,
DW_OP_breg21 = 0x85,
DW_OP_breg22 = 0x86,
DW_OP_breg23 = 0x87,
DW_OP_breg24 = 0x88,
DW_OP_breg25 = 0x89,
DW_OP_breg26 = 0x8a,
DW_OP_breg27 = 0x8b,
DW_OP_breg28 = 0x8c,
DW_OP_breg29 = 0x8d,
DW_OP_breg30 = 0x8e,
DW_OP_breg31 = 0x8f,
DW_OP_regx = 0x90,
DW_OP_fbreg = 0x91,
DW_OP_bregx = 0x92,
DW_OP_piece = 0x93,
DW_OP_deref_size = 0x94,
DW_OP_xderef_size = 0x95,
DW_OP_nop = 0x96,
DW_OP_push_object_address = 0x97,
DW_OP_call2 = 0x98,
DW_OP_call4 = 0x99,
DW_OP_call_ref = 0x9a,
DW_OP_form_tls_address = 0x9b,
DW_OP_call_frame_cfa = 0x9c,
DW_OP_bit_piece = 0x9d,
DW_OP_lo_user = 0xe0,
DW_OP_hi_user = 0xff,
DW_OP_GNU_push_tls_address = 0xe0,
DW_OP_GNU_uninit = 0xf0,
DW_OP_GNU_encoded_addr = 0xf1,
};
#define DW_EH_PE_native 0x00
#define DW_EH_PE_uleb128 0x01
#define DW_EH_PE_udata2 0x02
#define DW_EH_PE_udata4 0x03
#define DW_EH_PE_udata8 0x04
#define DW_EH_PE_sleb128 0x09
#define DW_EH_PE_sdata2 0x0a
#define DW_EH_PE_sdata4 0x0b
#define DW_EH_PE_sdata8 0x0c
#define DW_EH_PE_signed 0x08
#define DW_EH_PE_abs 0x00
#define DW_EH_PE_pcrel 0x10
#define DW_EH_PE_textrel 0x20
#define DW_EH_PE_datarel 0x30
#define DW_EH_PE_funcrel 0x40
#define DW_EH_PE_aligned 0x50
#define DW_EH_PE_indirect 0x80
#define DW_EH_PE_omit 0xff
struct dwarf_eh_bases
{
void *tbase;
void *dbase;
void *func;
};
struct dwarf_cie
{
unsigned int length;
int id;
unsigned char version;
unsigned char augmentation[1];
};
struct dwarf_fde
{
unsigned int length;
unsigned int cie_offset;
};
extern const struct dwarf_fde *_Unwind_Find_FDE (void *, struct dwarf_eh_bases *);
static unsigned char dwarf_get_u1( const unsigned char **p )
{
return *(*p)++;
}
static unsigned short dwarf_get_u2( const unsigned char **p )
{
unsigned int ret = (*p)[0] | ((*p)[1] << 8);
(*p) += 2;
return ret;
}
static unsigned int dwarf_get_u4( const unsigned char **p )
{
unsigned int ret = (*p)[0] | ((*p)[1] << 8) | ((*p)[2] << 16) | ((*p)[3] << 24);
(*p) += 4;
return ret;
}
static ULONG64 dwarf_get_u8( const unsigned char **p )
{
ULONG64 low = dwarf_get_u4( p );
ULONG64 high = dwarf_get_u4( p );
return low | (high << 32);
}
static ULONG_PTR dwarf_get_uleb128( const unsigned char **p )
{
ULONG_PTR ret = 0;
unsigned int shift = 0;
unsigned char byte;
do
{
byte = **p;
ret |= (ULONG_PTR)(byte & 0x7f) << shift;
shift += 7;
(*p)++;
} while (byte & 0x80);
return ret;
}
static LONG_PTR dwarf_get_sleb128( const unsigned char **p )
{
ULONG_PTR ret = 0;
unsigned int shift = 0;
unsigned char byte;
do
{
byte = **p;
ret |= (ULONG_PTR)(byte & 0x7f) << shift;
shift += 7;
(*p)++;
} while (byte & 0x80);
if ((shift < 8 * sizeof(ret)) && (byte & 0x40)) ret |= -((ULONG_PTR)1 << shift);
return ret;
}
static ULONG_PTR dwarf_get_ptr( const unsigned char **p, unsigned char encoding, const struct dwarf_eh_bases *bases )
{
ULONG_PTR base;
if (encoding == DW_EH_PE_omit) return 0;
switch (encoding & 0x70)
{
case DW_EH_PE_abs:
base = 0;
break;
case DW_EH_PE_pcrel:
base = (ULONG_PTR)*p;
break;
case DW_EH_PE_textrel:
base = (ULONG_PTR)bases->tbase;
break;
case DW_EH_PE_datarel:
base = (ULONG_PTR)bases->dbase;
break;
case DW_EH_PE_funcrel:
base = (ULONG_PTR)bases->func;
break;
case DW_EH_PE_aligned:
base = ((ULONG_PTR)*p + 7) & ~7ul;
break;
default:
FIXME( "unsupported encoding %02x\n", encoding );
return 0;
}
switch (encoding & 0x0f)
{
case DW_EH_PE_native: base += dwarf_get_u8( p ); break;
case DW_EH_PE_uleb128: base += dwarf_get_uleb128( p ); break;
case DW_EH_PE_udata2: base += dwarf_get_u2( p ); break;
case DW_EH_PE_udata4: base += dwarf_get_u4( p ); break;
case DW_EH_PE_udata8: base += dwarf_get_u8( p ); break;
case DW_EH_PE_sleb128: base += dwarf_get_sleb128( p ); break;
case DW_EH_PE_sdata2: base += (signed short)dwarf_get_u2( p ); break;
case DW_EH_PE_sdata4: base += (signed int)dwarf_get_u4( p ); break;
case DW_EH_PE_sdata8: base += (LONG64)dwarf_get_u8( p ); break;
default:
FIXME( "unsupported encoding %02x\n", encoding );
return 0;
}
if (encoding & DW_EH_PE_indirect) base = *(ULONG_PTR *)base;
return base;
}
enum reg_rule
{
RULE_UNSET, /* not set at all */
RULE_UNDEFINED, /* undefined value */
RULE_SAME, /* same value as previous frame */
RULE_CFA_OFFSET, /* stored at cfa offset */
RULE_OTHER_REG, /* stored in other register */
RULE_EXPRESSION, /* address specified by expression */
RULE_VAL_EXPRESSION /* value specified by expression */
};
#define NB_FRAME_REGS 41
#define MAX_SAVED_STATES 16
struct frame_state
{
ULONG_PTR cfa_offset;
unsigned char cfa_reg;
enum reg_rule cfa_rule;
enum reg_rule rules[NB_FRAME_REGS];
ULONG64 regs[NB_FRAME_REGS];
};
struct frame_info
{
ULONG_PTR ip;
ULONG_PTR code_align;
LONG_PTR data_align;
unsigned char retaddr_reg;
unsigned char fde_encoding;
unsigned char signal_frame;
unsigned char state_sp;
struct frame_state state;
struct frame_state *state_stack;
};
static const char *dwarf_reg_names[NB_FRAME_REGS] =
{
/* 0-7 */ "%rax", "%rdx", "%rcx", "%rbx", "%rsi", "%rdi", "%rbp", "%rsp",
/* 8-16 */ "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", "%rip",
/* 17-24 */ "%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6", "%xmm7",
/* 25-32 */ "%xmm8", "%xmm9", "%xmm10", "%xmm11", "%xmm12", "%xmm13", "%xmm14", "%xmm15",
/* 33-40 */ "%st0", "%st1", "%st2", "%st3", "%st4", "%st5", "%st6", "%st7"
};
static BOOL valid_reg( ULONG_PTR reg )
{
if (reg >= NB_FRAME_REGS) FIXME( "unsupported reg %lx\n", reg );
return (reg < NB_FRAME_REGS);
}
static void execute_cfa_instructions( const unsigned char *ptr, const unsigned char *end,
ULONG_PTR last_ip, struct frame_info *info,
const struct dwarf_eh_bases *bases )
{
while (ptr < end && info->ip < last_ip + info->signal_frame)
{
enum dwarf_call_frame_info op = *ptr++;
if (op & 0xc0)
{
switch (op & 0xc0)
{
case DW_CFA_advance_loc:
{
ULONG_PTR offset = (op & 0x3f) * info->code_align;
TRACE( "%lx: DW_CFA_advance_loc %lu\n", info->ip, offset );
info->ip += offset;
break;
}
case DW_CFA_offset:
{
ULONG_PTR reg = op & 0x3f;
LONG_PTR offset = dwarf_get_uleb128( &ptr ) * info->data_align;
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_offset %s, %ld\n", info->ip, dwarf_reg_names[reg], offset );
info->state.regs[reg] = offset;
info->state.rules[reg] = RULE_CFA_OFFSET;
break;
}
case DW_CFA_restore:
{
ULONG_PTR reg = op & 0x3f;
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_restore %s\n", info->ip, dwarf_reg_names[reg] );
info->state.rules[reg] = RULE_UNSET;
break;
}
}
}
else switch (op)
{
case DW_CFA_nop:
break;
case DW_CFA_set_loc:
{
ULONG_PTR loc = dwarf_get_ptr( &ptr, info->fde_encoding, bases );
TRACE( "%lx: DW_CFA_set_loc %lx\n", info->ip, loc );
info->ip = loc;
break;
}
case DW_CFA_advance_loc1:
{
ULONG_PTR offset = *ptr++ * info->code_align;
TRACE( "%lx: DW_CFA_advance_loc1 %lu\n", info->ip, offset );
info->ip += offset;
break;
}
case DW_CFA_advance_loc2:
{
ULONG_PTR offset = dwarf_get_u2( &ptr ) * info->code_align;
TRACE( "%lx: DW_CFA_advance_loc2 %lu\n", info->ip, offset );
info->ip += offset;
break;
}
case DW_CFA_advance_loc4:
{
ULONG_PTR offset = dwarf_get_u4( &ptr ) * info->code_align;
TRACE( "%lx: DW_CFA_advance_loc4 %lu\n", info->ip, offset );
info->ip += offset;
break;
}
case DW_CFA_offset_extended:
case DW_CFA_offset_extended_sf:
{
ULONG_PTR reg = dwarf_get_uleb128( &ptr );
LONG_PTR offset = (op == DW_CFA_offset_extended) ? dwarf_get_uleb128( &ptr ) * info->data_align
: dwarf_get_sleb128( &ptr ) * info->data_align;
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_offset_extended %s, %ld\n", info->ip, dwarf_reg_names[reg], offset );
info->state.regs[reg] = offset;
info->state.rules[reg] = RULE_CFA_OFFSET;
break;
}
case DW_CFA_restore_extended:
{
ULONG_PTR reg = dwarf_get_uleb128( &ptr );
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_restore_extended %s\n", info->ip, dwarf_reg_names[reg] );
info->state.rules[reg] = RULE_UNSET;
break;
}
case DW_CFA_undefined:
{
ULONG_PTR reg = dwarf_get_uleb128( &ptr );
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_undefined %s\n", info->ip, dwarf_reg_names[reg] );
info->state.rules[reg] = RULE_UNDEFINED;
break;
}
case DW_CFA_same_value:
{
ULONG_PTR reg = dwarf_get_uleb128( &ptr );
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_same_value %s\n", info->ip, dwarf_reg_names[reg] );
info->state.regs[reg] = reg;
info->state.rules[reg] = RULE_SAME;
break;
}
case DW_CFA_register:
{
ULONG_PTR reg = dwarf_get_uleb128( &ptr );
ULONG_PTR reg2 = dwarf_get_uleb128( &ptr );
if (!valid_reg( reg ) || !valid_reg( reg2 )) break;
TRACE( "%lx: DW_CFA_register %s == %s\n", info->ip, dwarf_reg_names[reg], dwarf_reg_names[reg2] );
info->state.regs[reg] = reg2;
info->state.rules[reg] = RULE_OTHER_REG;
break;
}
case DW_CFA_remember_state:
TRACE( "%lx: DW_CFA_remember_state\n", info->ip );
if (info->state_sp >= MAX_SAVED_STATES)
FIXME( "%lx: DW_CFA_remember_state too many nested saves\n", info->ip );
else
info->state_stack[info->state_sp++] = info->state;
break;
case DW_CFA_restore_state:
TRACE( "%lx: DW_CFA_restore_state\n", info->ip );
if (!info->state_sp)
FIXME( "%lx: DW_CFA_restore_state without corresponding save\n", info->ip );
else
info->state = info->state_stack[--info->state_sp];
break;
case DW_CFA_def_cfa:
case DW_CFA_def_cfa_sf:
{
ULONG_PTR reg = dwarf_get_uleb128( &ptr );
ULONG_PTR offset = (op == DW_CFA_def_cfa) ? dwarf_get_uleb128( &ptr )
: dwarf_get_sleb128( &ptr ) * info->data_align;
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_def_cfa %s, %lu\n", info->ip, dwarf_reg_names[reg], offset );
info->state.cfa_reg = reg;
info->state.cfa_offset = offset;
info->state.cfa_rule = RULE_CFA_OFFSET;
break;
}
case DW_CFA_def_cfa_register:
{
ULONG_PTR reg = dwarf_get_uleb128( &ptr );
if (!valid_reg( reg )) break;
TRACE( "%lx: DW_CFA_def_cfa_register %s\n", info->ip, dwarf_reg_names[reg] );
info->state.cfa_reg = reg;
info->state.cfa_rule = RULE_CFA_OFFSET;
break;
}
case DW_CFA_def_cfa_offset:
case DW_CFA_def_cfa_offset_sf:
{
ULONG_PTR offset = (op == DW_CFA_def_cfa_offset) ? dwarf_get_uleb128( &ptr )
: dwarf_get_sleb128( &ptr ) * info->data_align;
TRACE( "%lx: DW_CFA_def_cfa_offset %lu\n", info->ip, offset );
info->state.cfa_offset = offset;
info->state.cfa_rule = RULE_CFA_OFFSET;
break;
}
case DW_CFA_def_cfa_expression:
{
ULONG_PTR expr = (ULONG_PTR)ptr;
ULONG_PTR len = dwarf_get_uleb128( &ptr );
TRACE( "%lx: DW_CFA_def_cfa_expression %lx-%lx\n", info->ip, expr, expr+len );
info->state.cfa_offset = expr;
info->state.cfa_rule = RULE_VAL_EXPRESSION;
ptr += len;
break;
}
case DW_CFA_expression:
case DW_CFA_val_expression: