From b29069aa8778528c6fe0b1c3e0b80b06363d1ed3 Mon Sep 17 00:00:00 2001 From: Jonathan Zhou Date: Wed, 16 Sep 2020 13:17:32 -0600 Subject: [PATCH] coresight: etm4x: Fix issues on trcseqevr access [ Upstream commit 4cd83037cd957ad97756055355ab4ee63f259380 ] The TRCSEQEVR(3) is reserved, using '@nrseqstate - 1' instead to avoid accessing the reserved register. Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states") Cc: Mathieu Poirier Cc: Suzuki K Poulose Cc: Mike Leach Cc: Shaokun Zhang Signed-off-by: Jonathan Zhou [Fixed capital letter in title] Signed-off-by: Mathieu Poirier Link: https://lore.kernel.org/r/20200916191737.4001561-12-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- drivers/hwtracing/coresight/coresight-etm4x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 2bcc8d4a82c8e..944c7a7cc1d91 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -1193,7 +1193,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) state->trcvdsacctlr = readl(drvdata->base + TRCVDSACCTLR); state->trcvdarcctlr = readl(drvdata->base + TRCVDARCCTLR); - for (i = 0; i < drvdata->nrseqstate; i++) + for (i = 0; i < drvdata->nrseqstate - 1; i++) state->trcseqevr[i] = readl(drvdata->base + TRCSEQEVRn(i)); state->trcseqrstevr = readl(drvdata->base + TRCSEQRSTEVR); @@ -1298,7 +1298,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) writel_relaxed(state->trcvdsacctlr, drvdata->base + TRCVDSACCTLR); writel_relaxed(state->trcvdarcctlr, drvdata->base + TRCVDARCCTLR); - for (i = 0; i < drvdata->nrseqstate; i++) + for (i = 0; i < drvdata->nrseqstate - 1; i++) writel_relaxed(state->trcseqevr[i], drvdata->base + TRCSEQEVRn(i));