Disable volatile workaround for excess precision segv for SSE

Previously it was only being disabled for SSE2.
xapian · Dec 11, 2016 · c189a54 · c189a54
1 parent a0697dd
commit c189a54
Showing 1 changed file with 3 additions and 1 deletion.
diff --git a/xapian-core/api/queryinternal.cc b/xapian-core/api/queryinternal.cc
@@ -80,7 +80,9 @@ namespace Internal {
 struct CmpMaxOrTerms {
     /** Return true if and only if a has a strictly greater termweight than b. */
     bool operator()(const PostList *a, const PostList *b) {
-#if (defined(__i386__) && !defined(__SSE2_MATH__)) || defined(__mc68000__) || defined(__mc68010__) || defined(__mc68020__) || defined(__mc68030__)
+#if (defined(__i386__) && !defined(__SSE_MATH__)) || \
+    defined(__mc68000__) || defined(__mc68010__) || \
+    defined(__mc68020__) || defined(__mc68030__)
 	// On some architectures, most common of which is x86, floating point
 	// values are calculated and stored in registers with excess precision.
 	// If the two get_maxweight() calls below return identical values in a