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Add mips arch #455

Closed
wants to merge 3 commits into from

3 participants

@theuni
Owner

Nothing exciting here, basically just the same guards we already have for ppc/arm, plus some atomics borrowed from the Linux kernel (and split out to avoid making things messy).

theuni added some commits
theuni mips: add guards 832dfd9
theuni mips: add atomics
Most taken from the linux kernel.
9e3a819
theuni mips: add configure options a308ddf
@jimfcarroll
Collaborator

Hey. New MIPS atmomics. How about fixing the Linux AtomicAdd and AtomicSubtract return values.

@TheUni: Do you want to get the tests running for these?

@jimfcarroll
Collaborator

Do we really need to hard code the python version? Does the autoconf script fail?

Owner

There is no good way of doing this. Python is almost impossible to build via cross. It's either this, or try to control it with an assortment of configure options and environment variables.

It's been a while on this one, I can certainly give it another go.

Collaborator

No No. I just asked. I didn't realize this was being cross-compiled. That explains why the autoconf macro can't be used. IMO it's not a big enough deal to spend more time on.

Owner

Well it's far more than that. Python uses drumroll python as part of its build process. Furthermore, it uses python to determine how to run THAT build process. So without being able to run at build-time, even when building a host-python, it's a mess. See just above, ios does the same thing.

As I said, it was either this, or some crazy options. IMO it's better to leave it with something reasonable and let packagers patch configure if necessary.

@theuni
Owner

Heh, fixing x86 is out of my league I'm afraid.

As for the tests.. sure. Is anything needed to hook them up?

@jimfcarroll
Collaborator

Yeah ... that was a nudge to phi :)

@theuni theuni commented on the diff
xbmc/utils/fastmemcpy.c
@@ -21,7 +21,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301, USA.
*****************************************************************************/
-#if !defined(_WIN32) && !defined(__ppc__) && !defined(__powerpc__) && !defined(__arm__)
@theuni Owner
theuni added a note

I'd really prefer that these be (x86 || x64) rather than !(everything else), especially since we're testing mmx/sse.

But I"m hesitant to hook up i386 (which is what my 32bit gcc shows) as I'm not sure how universal that is. I would assume it's fine, but that's the kind of assumption that usually makes me look stupid.

Ideas welcome.

Grr, stupid markup. That's _ i386 _

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@jimfcarroll
Collaborator

As for the tests, I have them separated out from boost now. I need to do a little work on them yet, but I'll let you know this weekend when you can give them a shot. Of course you'll need to run them on a mips machine.

@davilla

I'me beginning to thing that we should be using compiler atomic where supported. As far as I know, the only compiler that does not have the nice atomic intrinsics is osx's gcc-4.0. Pretty much everything else is at least 4.2 and above. As for osx, after 11.0 release, we bump to 10.6sdk and move to gcc-4.2/llvm-cpp-4.2.

@theuni
Owner

Ok, the python stuff can be removed as they can be influenced with env vars. That leaves the implementation clean.

I'll be pushing this in soon unless there are any other complaints.

@theuni
Owner

Closing this, it'll come as part of a bigger refactor.

@theuni theuni closed this
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Commits on Sep 30, 2011
  1. mips: add guards

    theuni authored
  2. mips: add atomics

    theuni authored
    Most taken from the linux kernel.
  3. mips: add configure options

    theuni authored
This page is out of date. Refresh to see the latest.
View
2  Makefile.in
@@ -425,7 +425,7 @@ ifeq (@USE_ASAP_CODEC@,1)
endif
endif
$(MAKE) -C lib/stsound/StSoundLibrary
-ifeq ($(or $(findstring powerpc,@ARCH@),$(findstring x86_64-linux,@ARCH@),$(findstring arm, @ARCH@)),)
+ifeq ($(or $(findstring powerpc,@ARCH@),$(findstring x86_64-linux,@ARCH@),$(findstring arm, @ARCH@),$(findstring mips,@ARCH@)),)
$(MAKE) -C lib/snesapu/SNES/SNESAPU
endif
imagelib: dllloader
View
11 configure.in
@@ -502,6 +502,15 @@ case $host in
use_arch="arm"
AC_SUBST(ARCH_DEFINES, "-DTARGET_POSIX -DTARGET_LINUX -D_LINUX -D_ARMEL")
;;
+ mips-*-linux-gnu)
+ ARCH="mipsel-linux"
+ PYTHON_VERSION="2.6"
+ PYTHON_LDFLAGS="$LDFLAGS -lpython2.6"
+ PYTHON_NOVERSIONCHECK="no-check"
+ use_texturepacker_native=yes
+ AC_SUBST(ARCH_DEFINES, "-DTARGET_POSIX -DTARGET_LINUX -D_LINUX")
+ ;;
+
*)
AC_MSG_ERROR(unsupported host ($host))
esac
@@ -584,6 +593,8 @@ elif test "$use_arch" = "arm"; then
CXXFLAGS+=" -Wa,-march=armv7a -mcpu=cortex-a8 -mfpu=neon -mvectorize-with-neon-quad"
FFMPEG_EXTRACFLAGS+=" -mfpu=neon"
fi
+elif expr "X$host_cpu" : 'Xmips.*' > /dev/null; then
+ use_arch=mips
fi
# Checks for library functions.
View
2  xbmc/cores/DllLoader/DllLoader.h
@@ -24,7 +24,7 @@
#include "coffldr.h"
#include "LibraryLoader.h"
-#if defined(__linux__) && !defined(__powerpc__) && !defined(__arm__)
+#if defined(__linux__) && !defined(__powerpc__) && !defined(__arm__) && !defined(__mips__)
#define USE_LDT_KEEPER
#include "ldt_keeper.h"
#endif
View
2  xbmc/cores/DllLoader/ldt_keeper.c
@@ -19,7 +19,7 @@
*/
//#ifndef __powerpc__
-#if !defined(__powerpc__) && !defined(__ppc__) && !defined(__arm__)
+#if !defined(__powerpc__) && !defined(__ppc__) && !defined(__arm__) && !defined(__mips__)
#include "ldt_keeper.h"
View
2  xbmc/linux/PlatformDefs.h
@@ -155,7 +155,7 @@
#define __int64 long long
#define __uint64 unsigned long long
-#if defined(__x86_64__) || defined(__powerpc__) || defined(__ppc__) || defined (__arm__) // should this be powerpc64 only?
+#if defined(__x86_64__) || defined(__powerpc__) || defined(__ppc__) || defined (__arm__) || defined(__mips__) // should this be powerpc64 only?
#define __stdcall
#else /* !__x86_64__ */
#define __stdcall __attribute__((__stdcall__))
View
43 xbmc/threads/Atomics.cpp
@@ -20,6 +20,10 @@
*/
#include "Atomics.h"
+#if defined(__mips__)
+#include "MipsAtomics.h"
+pthread_mutex_t cmpxchg_mutex = PTHREAD_MUTEX_INITIALIZER;
+#endif
///////////////////////////////////////////////////////////////////////////
// 32-bit atomic compare-and-swap
@@ -69,7 +73,10 @@ long cas(volatile long* pAddr, long expectedVal, long swapVal)
}
#elif defined(__mips__)
-// TODO:
+long cas(volatile long* pAddr,long expectedVal, long swapVal)
+{
+ return cmpxchg32(pAddr, expectedVal, swapVal);
+}
#elif defined(WIN32)
@@ -115,10 +122,16 @@ long cas(volatile long* pAddr,long expectedVal, long swapVal)
// 64-bit atomic compare-and-swap
// Returns previous value of *pAddr
///////////////////////////////////////////////////////////////////////////
-#if defined(__ppc__) || defined(__powerpc__) || defined(__arm__) || defined(__mips__) // PowerPC, ARM, and MIPS
+#if defined(__ppc__) || defined(__powerpc__) || defined(__arm__)// PowerPC and ARM
// Not available/required
+#elif defined(__mips__)
+long long cas2(volatile long long* pAddr, long long expectedVal, long long swapVal)
+{
+ return cmpxchg64(pAddr, expectedVal, swapVal);
+}
+
#elif defined(WIN32)
long long cas2(volatile long long* pAddr, long long expectedVal, long long swapVal)
@@ -210,7 +223,12 @@ long AtomicIncrement(volatile long* pAddr)
}
#elif defined(__mips__)
-// TODO:
+
+long AtomicIncrement(volatile long* pAddr)
+{
+ return atomic_add(1, pAddr);
+}
+
#elif defined(WIN32)
@@ -289,7 +307,12 @@ long AtomicAdd(volatile long* pAddr, long amount)
}
#elif defined(__mips__)
-// TODO:
+
+long AtomicAdd(volatile long* pAddr, long amount)
+{
+ return atomic_add(amount, pAddr);
+}
+
#elif defined(WIN32)
@@ -368,7 +391,11 @@ long AtomicDecrement(volatile long* pAddr)
}
#elif defined(__mips__)
-// TODO:
+
+long AtomicDecrement(volatile long* pAddr)
+{
+ return atomic_sub(1, pAddr);
+}
#elif defined(WIN32)
@@ -448,7 +475,11 @@ long AtomicSubtract(volatile long* pAddr, long amount)
}
#elif defined(__mips__)
-// TODO:
+
+long AtomicSubtract(volatile long* pAddr, long amount)
+{
+ return atomic_sub(amount, pAddr);
+}
#elif defined(WIN32)
View
115 xbmc/threads/MipsAtomics.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2005-2011 Team XBMC
+ * http://www.xbmc.org
+ *
+ * This Program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This Program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with XBMC; see the file COPYING. If not, write to
+ * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+ * http://www.gnu.org/copyleft/gpl.html
+ *
+ * Copyright (C) 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
+ *
+ * Most of this file was borrowed from the linux kernel.
+ */
+
+#ifndef __ATOMIC_MIPS_H_
+#define __ATOMIC_MIPS_H_
+
+#include <inttypes.h>
+#include <pthread.h>
+
+extern pthread_mutex_t cmpxchg_mutex;
+
+static inline long cmpxchg32(volatile long *m, long oldval, long newval)
+{
+ long retval;
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set noat \n" \
+ " .set mips3 \n" \
+ "1: ll %0, %2 # __cmpxchg_asm \n" \
+ " bne %0, %z3, 2f \n" \
+ " .set mips0 \n" \
+ " move $1, %z4 \n" \
+ " .set mips3 \n" \
+ " sc $1, %1 \n" \
+ " beqz $1, 3f \n" \
+ "2: \n" \
+ " .subsection 2 \n" \
+ "3: b 1b \n" \
+ " .previous \n" \
+ " .set pop \n" \
+ : "=&r" (retval), "=R" (*m) \
+ : "R" (*m), "Jr" (oldval), "Jr" (newval) \
+ : "memory"); \
+
+ return retval;
+}
+
+
+static inline long long cmpxchg64(volatile long long *ptr,
+ long long oldval, long long newval)
+{
+ long long prev;
+
+ pthread_mutex_lock(&cmpxchg_mutex);
+ prev = *(long long *)ptr;
+ if (prev == oldval)
+ *(long long *)ptr = newval;
+ pthread_mutex_unlock(&cmpxchg_mutex);
+ return prev;
+}
+
+
+static __inline__ long atomic_add(int i, volatile long* v)
+{
+ long temp;
+
+ __asm__ __volatile__(
+ " .set mips3 \n"
+ "1: ll %0, %1 # atomic_add \n"
+ " addu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 2f \n"
+ " .subsection 2 \n"
+ "2: b 1b \n"
+ " .previous \n"
+ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*v)
+ : "Ir" (i), "m" (*v));
+
+ return temp;
+}
+
+static __inline__ long atomic_sub(int i, volatile long* v)
+{
+ long temp;
+
+ __asm__ __volatile__(
+ " .set mips3 \n"
+ "1: ll %0, %1 # atomic_sub \n"
+ " subu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 2f \n"
+ " .subsection 2 \n"
+ "2: b 1b \n"
+ " .previous \n"
+ " .set mips0 \n"
+ : "=&r" (temp), "=m" (*v)
+ : "Ir" (i), "m" (*v));
+
+ return temp;
+}
+
+
+#endif
View
6 xbmc/utils/MathUtils.h
@@ -63,7 +63,7 @@ namespace MathUtils
sar i, 1
}
#else
-#if defined(__powerpc__) || defined(__ppc__)
+#if defined(__powerpc__) || defined(__ppc__) || defined(__mips__)
i = floor(x + round_to_nearest);
#elif defined(__arm__)
// From 'ARM®v7-M Architecture Reference Manual' page A7-569:
@@ -128,7 +128,7 @@ namespace MathUtils
assert(x > static_cast<double>(INT_MIN / 2) - 1.0);
assert(x < static_cast <double>(INT_MAX / 2) + 1.0);
-#if !defined(__powerpc__) && !defined(__ppc__) && !defined(__arm__)
+#if !defined(__powerpc__) && !defined(__ppc__) && !defined(__arm__) && !defined(__mips__)
const float round_towards_m_i = -0.5f;
#endif
int i;
@@ -144,7 +144,7 @@ namespace MathUtils
sar i, 1
}
#else
-#if defined(__powerpc__) || defined(__ppc__)
+#if defined(__powerpc__) || defined(__ppc__) || defined(__mips__)
return (int)x;
#elif defined(__arm__)
__asm__ __volatile__ (
View
2  xbmc/utils/fastmemcpy.c
@@ -21,7 +21,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301, USA.
*****************************************************************************/
-#if !defined(_WIN32) && !defined(__ppc__) && !defined(__powerpc__) && !defined(__arm__)
@theuni Owner
theuni added a note

I'd really prefer that these be (x86 || x64) rather than !(everything else), especially since we're testing mmx/sse.

But I"m hesitant to hook up i386 (which is what my 32bit gcc shows) as I'm not sure how universal that is. I would assume it's fine, but that's the kind of assumption that usually makes me look stupid.

Ideas welcome.

Grr, stupid markup. That's _ i386 _

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+#if !defined(_WIN32) && !defined(__ppc__) && !defined(__powerpc__) && !defined(__arm__) && !defined(__mips__)
#define HAVE_MMX2
#define HAVE_SSE
View
2  xbmc/utils/fastmemcpy.h
@@ -22,7 +22,7 @@
extern "C" {
#endif
-#if !defined(_WIN32) && !defined(__ppc__) && !defined(__powerpc__)
+#if !defined(_WIN32) && !defined(__ppc__) && !defined(__powerpc__) && !defined(__mips__)
void * fast_memcpy(void * to, const void * from, size_t len);
//#define fast_memcpy memcpy
#else
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