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835a6db @djpwilk moved from sc_sdram, bugs with partout fixed, docs written
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1 XCORE.com SDRAM SOFTWARE COMPONENT
2 ..................................
3
4 :Stable release: 1.2 unreleased - based on SDRAM 1.1 of April 2010
5
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6 :Status: Released
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8 :Maintainer: `Dan Wilkinson <https://github.com/djpwilk>`_
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9
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10 :Description: A Burst Mode access driver for the Micron Technology MT48LC16M16A2 Synchronous DRAM
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11
12
13 Key Features
14 ============
15
16 * One thread reads/writes data to SDRAM
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17 * Optimised for burst access of blocks of 32 bit words (not for random access) with 12.5 MHz sdram clock.
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18 * Application retains control of refresh by calling sdram_refresh at
19 appropriate to prevent unexpected delays
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20 * 16-bit - Peak write: 25MB/s, read 25MB/s.
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21 * Code size: 2KB
22 * Thread count: 1
23
24 To Do
25 =====
26
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27 * Add build options for 8 and 4 bit data bus width
28 * Improve clock speed to 25 MHz
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29 * Rework sdram burst write and read code to used fully timestamped IO and deprecate the p_sdram_gate mechanism
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32 Firmware Overview
33 =================
34
35 * module_sdram_burst: the burst mode driver
36 * app_sdram_burst_example: contains a c client and an xc test harness
37
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38 Documentation
39 =============
40
41 Full documentation can be found at: http://xcore.github.com/sc_sdram_burst/
42
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43 Known Issues
44 ============
45
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46 * Two warnings produced in XDE 11.2 related to buffered port for DQ which has its direction reversed. This warning can be ignored.
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47
48 Required Repositories
49 =====================
50
51 * xcommon git\@github.com:xcore/xcommon.git
52
53 Support
54 =======
55
56 Issues may be submitted via the Issues tab in this github repo. Response to any issues submitted are at the discretion of the maintainer of this component.
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