diff --git a/tests/dialects/test_riscv.py b/tests/dialects/test_riscv.py
index 5146e411b6..968556a5c2 100644
--- a/tests/dialects/test_riscv.py
+++ b/tests/dialects/test_riscv.py
@@ -232,17 +232,17 @@ def test_immediate_shift_inst():
     riscv.SlliOp(a1, (1 << 5) - 1, rd=riscv.Registers.A0)
 
 
-def check_float_register():
-    with pytest.raises(VerifyException):
+def test_float_register():
+    with pytest.raises(VerifyException, match="not in"):
         riscv.RegisterType(riscv.Register("ft9"))
-    with pytest.raises(VerifyException):
+    with pytest.raises(VerifyException, match="not in"):
         riscv.FloatRegisterType(riscv.Register("a0"))
 
     a1 = TestSSAValue(riscv.Registers.A1)
     a2 = TestSSAValue(riscv.Registers.A2)
-    with pytest.raises(VerifyException):
-        riscv.FAddSOp(a1, a2)
+    with pytest.raises(VerifyException, match="Operation does not verify"):
+        riscv.FAddSOp(a1, a2).verify()
 
     f1 = TestSSAValue(riscv.Registers.FT0)
     f2 = TestSSAValue(riscv.Registers.FT1)
-    riscv.FAddSOp(f1, f2)
+    riscv.FAddSOp(f1, f2).verify()
diff --git a/xdsl/dialects/riscv.py b/xdsl/dialects/riscv.py
index 5aaf37f09c..aa9825f2ce 100644
--- a/xdsl/dialects/riscv.py
+++ b/xdsl/dialects/riscv.py
@@ -170,9 +170,11 @@ def print_parameter(self, printer: Printer) -> None:
         printer.print_string(name)
 
     def verify(self) -> None:
-        if self.data.name is None or self.data.name.startswith("j"):
+        name = self.data.name
+        if name is None or name.startswith("j"):
             return
-        assert self.data.name in Register.RV32I_INDEX_BY_NAME
+        if name not in Register.RV32I_INDEX_BY_NAME:
+            raise VerifyException(f"{name} not in RV32I")
 
 
 @irdl_attr_definition
@@ -211,9 +213,11 @@ def print_parameter(self, printer: Printer) -> None:
         printer.print_string(name)
 
     def verify(self) -> None:
-        if self.data.name is None or self.data.name.startswith("j"):
+        name = self.data.name
+        if name is None or name.startswith("j"):
             return
-        assert self.data.name in Register.RV32F_INDEX_BY_NAME
+        if name not in Register.RV32F_INDEX_BY_NAME:
+            raise VerifyException(f"{name} not in RV32F")
 
 
 class Registers(ABC):