From 84814b9a11d8f70b3bd92d428c70856d9ade594b Mon Sep 17 00:00:00 2001 From: hosseingbi Date: Thu, 4 Jan 2024 14:30:48 +0000 Subject: [PATCH 01/16] adding commands C_MODEL_NAME, C_MODEL_NUMBER and M_MODEL_NAME --- xoa_driver/enums.py | 10 ++- xoa_driver/internals/commands/c_commands.py | 54 ++++++++++++- xoa_driver/internals/commands/enums.py | 90 +++++++++++++++++++++ xoa_driver/internals/commands/m_commands.py | 29 ++++++- 4 files changed, 179 insertions(+), 4 deletions(-) diff --git a/xoa_driver/enums.py b/xoa_driver/enums.py index 9dd5fd98..6c48f792 100644 --- a/xoa_driver/enums.py +++ b/xoa_driver/enums.py @@ -169,7 +169,10 @@ StreamOption, DhcpState, DhcpVlanState, - VlanType + VlanType, + ChassisModelNumber, + ChassisModelName, + ModuleModelName ) __all__ = ( @@ -341,5 +344,8 @@ "StreamOption", "DhcpState", "DhcpVlanState", - "VlanType" + "VlanType", + "ChassisModelNumber", + "ChassisModelName", + "ModuleModelName" ) diff --git a/xoa_driver/internals/commands/c_commands.py b/xoa_driver/internals/commands/c_commands.py index d0862fb5..bdcfbec3 100644 --- a/xoa_driver/internals/commands/c_commands.py +++ b/xoa_driver/internals/commands/c_commands.py @@ -37,7 +37,9 @@ TimeKeeperLicenseType, TimeKeeperLicenseError, TimeKeeperServiceStatus, - TimeKeeperServiceAction + TimeKeeperServiceAction, + ChassisModelNumber, + ChassisModelName ) @@ -1905,3 +1907,53 @@ def get(self) -> Token[GetDataAttr]: """ return Token(self._connection, build_get_request(self)) + +@register_command +@dataclass +class C_MODEL_NAME: + """ + Get the Xena chassis model name. + """ + + code: typing.ClassVar[int] = 457 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + + class GetDataAttr(ResponseBodyStruct): + name: ChassisModelName = field(XmpInt()) + """ChassisModelName, the model of the Xena tester""" + + def get(self) -> Token[GetDataAttr]: + """Get the Xena chassis model name. + + :return: the model name of the Xena tester + :rtype: C_MODEL_NAME.GetDataAttr + """ + + return Token(self._connection, build_get_request(self)) + +@register_command +@dataclass +class C_MODEL_NUMBER: + """ + Get the Xena chassis model number. + """ + + code: typing.ClassVar[int] = 458 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + + class GetDataAttr(ResponseBodyStruct): + number: ChassisModelNumber = field(XmpInt()) + """ChassisModelNumber, the model of the Xena tester""" + + def get(self) -> Token[GetDataAttr]: + """Get the Xena chassis model number. + + :return: the model number of the Xena tester + :rtype: C_MODEL_NUMBER.GetDataAttr + """ + + return Token(self._connection, build_get_request(self)) diff --git a/xoa_driver/internals/commands/enums.py b/xoa_driver/internals/commands/enums.py index cb400792..b215b93b 100644 --- a/xoa_driver/internals/commands/enums.py +++ b/xoa_driver/internals/commands/enums.py @@ -2666,4 +2666,94 @@ class VlanType(IntEnum): TYPE_C = 0 TYPE_S = 1 +class ChassisModelNumber(IntEnum): + NA = 0 + XB1 = 1 + XB2 = 2 + XB3 = 3 + XB4 = 4 + XB5 = 5 + XB6 = 6 + XB7 = 7 + XB8 = 8 + XB9 = 9 + XB10 = 10 + XB10_5 = 11 + XB11 = 12 + XB12 = 13 + XB13 = 14 + XB14 = 15 + XB15 = 16 + XB16 = 17 + XB17 = 18 + XB18 = 19 + XB19 = 20 + XB20 = 21 + XB21 = 22 + XB22 = 23 + XB23 = 24 + XB33 = 25 + XC1 = 26 + XC2 = 27 + XC3 = 28 + XC4 = 29 + XC5 = 30 + XC6 = 31 + XC7 = 32 + XC8 = 33 + XC9 = 34 + XC10 = 35 + XC11 = 36 + XC12 = 37 + XC13 = 38 + XC14 = 39 + XC15 = 40 + XC16 = 41 + XC17 = 42 + XC18 = 43 + XC19 = 44 + XC20 = 45 + XC21 = 46 + XC22 = 47 + XC23 = 48 + XC24 = 49 + XC25 = 50 + XC26 = 51 + +class ChassisModelName(IntEnum): + NA = 0 + B720 = 1 + B720D = 2 + B2400 = 3 + Z_01_T_C_ODIN = 4 + Z_100_Q_C_LOKI = 5 + Z_10_S_C_ODIN = 6 + Z_10_C_C_ODIN = 7 + Z_10_R_C_ODIN = 8 + Z_10_S_X_C_ODIN = 9 + Z_01_S_C_ODIN = 10 + Z_01_S_X_C_ODIN = 11 + Z_400_Q_C_THOR = 12 + Z_400_Q_LE_C_THOR = 13 + Z_800_Q_C_FREYA = 14 + Z_800_O_C_FREYA = 15 + Z_800_Q_A_C_FREYA = 16 + Z_800_O_A_C_FREYA = 17 + E_100_Q_C_CHIMERA = 18 + +class ModuleModelName(IntEnum): + NA = 0 + Z_01_T_ODIN = 1 + Z_100_Q_LOKI = 2 + Z_10_S_ODIN = 3 + Z_10_R_ODIN = 4 + Z_10_S_X_ODIN = 5 + Z_01_S_ODIN = 6 + Z_01_S_X_ODIN = 7 + Z_400_Q_THOR = 8 + Z_400_Q_LE_THOR = 9 + Z_800_Q_FREYA = 10 + Z_800_O_FREYA = 11 + E_100_Q_CHIMERA = 12 + # endregion diff --git a/xoa_driver/internals/commands/m_commands.py b/xoa_driver/internals/commands/m_commands.py index 83a38a3e..11a88ccf 100644 --- a/xoa_driver/internals/commands/m_commands.py +++ b/xoa_driver/internals/commands/m_commands.py @@ -45,6 +45,7 @@ ImpairmentLatencyMode, PPMSweepStatus, PPMSweepMode, + ModuleModelName ) @@ -1780,4 +1781,30 @@ def get(self) -> Token[GetDataAttr]: :rtype: M_HEALTH.GetDataAttr """ - return Token(self._connection, build_get_request(self, module=self._module)) \ No newline at end of file + return Token(self._connection, build_get_request(self, module=self._module)) + +@register_command +@dataclass +class M_MODEL_NAME: + """ + Get the model name of the module. + """ + + code: typing.ClassVar[int] = 459 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + + class GetDataAttr(ResponseBodyStruct): + name: ModuleModelName = field(XmpInt()) + """ModuleModelName, model name of the Xena module.""" + + def get(self) -> Token[GetDataAttr]: + """Get the Xena chassis model name. + + :return: the model name of the Xena tester + :rtype: C_MODEL_NAME.GetDataAttr + """ + + return Token(self._connection, build_get_request(self, module=self._module)) From e7556a91ae846624ff260b1a392ee256d0889827 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Tue, 23 Jan 2024 14:56:57 +0100 Subject: [PATCH 02/16] Fix PP_RXLANEERRORS command id error --- xoa_driver/internals/commands/pp_commands.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xoa_driver/internals/commands/pp_commands.py b/xoa_driver/internals/commands/pp_commands.py index ae10531c..8a2070b5 100644 --- a/xoa_driver/internals/commands/pp_commands.py +++ b/xoa_driver/internals/commands/pp_commands.py @@ -684,7 +684,7 @@ class PP_RXLANEERRORS: received on a specified physical lane. """ - code: typing.ClassVar[int] = 292 + code: typing.ClassVar[int] = 271 pushed: typing.ClassVar[bool] = False _connection: 'interfaces.IConnection' From c1390824be99a66cc8fc8d3f7958032332c0709e Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Tue, 23 Jan 2024 14:57:50 +0100 Subject: [PATCH 03/16] Update readthedocs-sphinx-search to 0.3.2 --- docs/requirements.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/requirements.txt b/docs/requirements.txt index 569f8ff7..8fc7c606 100644 --- a/docs/requirements.txt +++ b/docs/requirements.txt @@ -2,7 +2,7 @@ # Defining the exact version will make sure things don't break sphinx==7.2.2 -readthedocs-sphinx-search==0.3.1 +readthedocs-sphinx-search==0.3.2 sphinx-inline-tabs==2023.4.21 loguru==0.7.0 furo==2023.8.17 From 7998febf5b000b10c1d0a27b2360a2abdd3130ea Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Mon, 26 Feb 2024 16:18:52 +0100 Subject: [PATCH 04/16] Add SSPRQ, Square Wave and RS-FEC-Int --- xoa_driver/internals/commands/enums.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xoa_driver/internals/commands/enums.py b/xoa_driver/internals/commands/enums.py index cb400792..4193831c 100644 --- a/xoa_driver/internals/commands/enums.py +++ b/xoa_driver/internals/commands/enums.py @@ -1111,6 +1111,8 @@ class FECMode(IntEnum): """RS FEC KR""" RS_FEC_KP = 5 """RS FEC KP""" + RS_FEC_INT = 6 + """RS FEC Int""" class PRBSInsertedType(IntEnum): @@ -1151,6 +1153,10 @@ class PRBSPolynomial(IntEnum): """PRBS-20""" PRBS13 = 10 """PRBS-13""" + SSPRQ = 24 + """SSPRQ""" + SQUARE_WAVE = 25 + """Square Wave""" class PRBSInvertState(IntEnum): From 2e6e8942307a369ce45a1c6a7ee9681ce5a7e901 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Mon, 26 Feb 2024 16:19:06 +0100 Subject: [PATCH 05/16] Add can_eyescanto p_cap --- xoa_driver/internals/commands/p_commands.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xoa_driver/internals/commands/p_commands.py b/xoa_driver/internals/commands/p_commands.py index 1164aef0..e1eb0087 100644 --- a/xoa_driver/internals/commands/p_commands.py +++ b/xoa_driver/internals/commands/p_commands.py @@ -553,6 +553,8 @@ class GetDataAttr(ResponseBodyStruct): """minimum I2C frequency""" max_i2c_frequency: int = field(XmpInt(), min_version=463) """maximum I2C frequency""" + can_eyescan: int = field(XmpInt(), min_version=463) + """Bit 0 ==1 => Sampled Eye Scan supported.""" def get(self) -> Token[GetDataAttr]: From 6d9fc9ce7d68f70210e5658c2335bb7efe9bbd39 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Mon, 26 Feb 2024 20:58:12 +0100 Subject: [PATCH 06/16] Fix M_CLOCKPPBSWEEP bug --- xoa_driver/__init__.py | 4 ++-- xoa_driver/internals/commands/m_commands.py | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xoa_driver/__init__.py b/xoa_driver/__init__.py index 134abd3d..7855f3ec 100644 --- a/xoa_driver/__init__.py +++ b/xoa_driver/__init__.py @@ -1,2 +1,2 @@ -__version__ = "2.4.3" -__short_version__ = "2.0" +__version__ = "2.5.0" +__short_version__ = "2.5" diff --git a/xoa_driver/internals/commands/m_commands.py b/xoa_driver/internals/commands/m_commands.py index 11a88ccf..fefd40c0 100644 --- a/xoa_driver/internals/commands/m_commands.py +++ b/xoa_driver/internals/commands/m_commands.py @@ -1555,7 +1555,7 @@ class M_CLOCKPPBSWEEP: _module: int class GetDataAttr(ResponseBodyStruct): - mode: PPMSweepMode = field(XmpInt()) + mode: PPMSweepMode = field(XmpByte()) """coded byte, specifying the sweeping function.""" ppb_step: int = field(XmpInt()) """integer >=0, the numeric clock adjustment in ppb per step of the sweep. From 552da305123bc48680ea0cbd1f838ddf6f04cd96 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Mon, 26 Feb 2024 21:06:07 +0100 Subject: [PATCH 07/16] Fix PPMSweepMode enum --- xoa_driver/internals/commands/enums.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xoa_driver/internals/commands/enums.py b/xoa_driver/internals/commands/enums.py index 9b802780..6182cd9b 100644 --- a/xoa_driver/internals/commands/enums.py +++ b/xoa_driver/internals/commands/enums.py @@ -1415,7 +1415,7 @@ class LinkTrainFrameLock(IntEnum): class PPMSweepMode(IntEnum): """Module clock PPM Sweep Modes""" - OFF = 0 + NONE = 0 """Off""" TRIANGLE = 1 """Triangle sweeping""" From 1b4e331a8c467748e6a2c5eae900947c918f70a5 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 00:06:17 +0100 Subject: [PATCH 08/16] Update license --- LICENSE | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/LICENSE b/LICENSE index fc2f5937..db8df1fa 100644 --- a/LICENSE +++ b/LICENSE @@ -187,7 +187,7 @@ same "printed page" as the copyright notice for easier identification within third-party archives. - Copyright 2023 Xena Networks + Copyright 2024 Teledyne LeCroy Xena Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. From e92e0af823afe982f4e45fbfd83d7f5284b640a5 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:24:53 +0100 Subject: [PATCH 09/16] Rename PP_LINKTRAINSTATUS index to serdes index --- xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py | 2 +- xoa_driver/internals/hli_v2/ports/port_l23/pcs_pma_l.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py index 1d0dbd41..151a274a 100644 --- a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py +++ b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py @@ -40,7 +40,7 @@ def __init__(self, conn: "itf.IConnection", port) -> None: """ self.per_lane_status: Tuple[PP_LINKTRAINSTATUS, ...] = tuple( - PP_LINKTRAINSTATUS(conn, *port.kind, _lane_xindex=idx) + PP_LINKTRAINSTATUS(conn, *port.kind, _serdes_xindex=idx) for idx in range(port.info.capabilities.lane_count) ) # TODO: need to fix, currently port.info.capabilities must be none because virtual_lanes are created before awaiting the port """Link training status. diff --git a/xoa_driver/internals/hli_v2/ports/port_l23/pcs_pma_l.py b/xoa_driver/internals/hli_v2/ports/port_l23/pcs_pma_l.py index 76da974d..bfdfd9a2 100644 --- a/xoa_driver/internals/hli_v2/ports/port_l23/pcs_pma_l.py +++ b/xoa_driver/internals/hli_v2/ports/port_l23/pcs_pma_l.py @@ -37,7 +37,7 @@ def __init__(self, conn: "itf.IConnection", port) -> None: """ self.per_lane_status: Tuple[PP_LINKTRAINSTATUS, ...] = tuple( - PP_LINKTRAINSTATUS(conn, *port.kind, _lane_xindex=idx) + PP_LINKTRAINSTATUS(conn, *port.kind, _serdes_xindex=idx) for idx in range(port.info.capabilities.lane_count) ) # TODO: need to fix, currently port.info.capabilities must be none because virtual_lanes are created before awaiting the port """Link training status. From 0a735cf77324ec0c63337d66dfae099deb633254 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:25:17 +0100 Subject: [PATCH 10/16] Rename to FamilyFreya --- .../hli_v1/ports/port_l23/family_l1.py | 32 +++++++++---------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py b/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py index 3a8e33d6..71c8185d 100644 --- a/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py +++ b/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py @@ -31,7 +31,7 @@ def __init__(self, conn: "itf.IConnection", port) -> None: PcsPma3.__init__(self, conn, port) -class FamilyL1(BasePortL23Genuine): +class FamilyFreya(BasePortL23Genuine): pcs_pma: PcsPma """PCS/PMA layer @@ -67,92 +67,92 @@ async def _setup(self) -> Self: """Register a callback to the event that the port's dynamic traffic setting changes.""" -class PFreya800G1S1P_a(FamilyL1): +class PFreya800G1S1P_a(FamilyFreya): """L23 port on Freya-800G-1S-1P[a] module. """ ... -class PFreya800G1S1P_b(FamilyL1): +class PFreya800G1S1P_b(FamilyFreya): """L23 port on Freya-800G-1S-1P[b] module. """ ... -class PFreya800G1S1POSFP_a(FamilyL1): +class PFreya800G1S1POSFP_a(FamilyFreya): """L23 port on Freya-800G-1S-1P-OSFP[a] module. """ ... -class PFreya800G4S1P_a(FamilyL1): +class PFreya800G4S1P_a(FamilyFreya): """L23 port on Freya-800G-4S-1P[a] module. """ ... -class PFreya800G4S1P_b(FamilyL1): +class PFreya800G4S1P_b(FamilyFreya): """L23 port on Freya-800G-4S-1P[b] module. """ ... -class PFreya800G4S1P_c(FamilyL1): +class PFreya800G4S1P_c(FamilyFreya): """L23 port on Freya-800G-4S-1P[c] module. """ ... -class PFreya800G4S1P_d(FamilyL1): +class PFreya800G4S1P_d(FamilyFreya): """L23 port on Freya-800G-4S-1P[d] module. """ ... -class PFreya800G4S1P_e(FamilyL1): +class PFreya800G4S1P_e(FamilyFreya): """L23 port on Freya-800G-4S-1P[e] module. """ ... -class PFreya800G4S1P_f(FamilyL1): +class PFreya800G4S1P_f(FamilyFreya): """L23 port on Freya-800G-4S-1P[f] module. """ ... -class PFreya800G4S1POSFP_a(FamilyL1): +class PFreya800G4S1POSFP_a(FamilyFreya): """L23 port on Freya-800G-4S-1P-OSFP[a] module. """ ... -class PFreya800G4S1POSFP_b(FamilyL1): +class PFreya800G4S1POSFP_b(FamilyFreya): """L23 port on Freya-800G-4S-1P-OSFP[b] module. """ ... -class PFreya800G4S1POSFP_c(FamilyL1): +class PFreya800G4S1POSFP_c(FamilyFreya): """L23 port on Freya-800G-4S-1P-OSFP[c] module. """ ... -class PFreya800G4S1POSFP_d(FamilyL1): +class PFreya800G4S1POSFP_d(FamilyFreya): """L23 port on Freya-800G-4S-1P-OSFP[d] module. """ ... -class PFreya800G4S1POSFP_e(FamilyL1): +class PFreya800G4S1POSFP_e(FamilyFreya): """L23 port on Freya-800G-4S-1P-OSFP[e] module. """ ... -class PFreya800G4S1POSFP_f(FamilyL1): +class PFreya800G4S1POSFP_f(FamilyFreya): """L23 port on Freya-800G-4S-1P-OSFP[f] module. """ ... \ No newline at end of file From 63325a1fec37f9bc942ae1b2dffad078b4c13a64 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:25:59 +0100 Subject: [PATCH 11/16] Change lane_index to serdes_index for PP_LINKTRAINSTATUS --- xoa_driver/internals/commands/pp_commands.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xoa_driver/internals/commands/pp_commands.py b/xoa_driver/internals/commands/pp_commands.py index 8a2070b5..efb5eb21 100644 --- a/xoa_driver/internals/commands/pp_commands.py +++ b/xoa_driver/internals/commands/pp_commands.py @@ -2168,7 +2168,7 @@ class PP_LINKTRAINSTATUS: _connection: 'interfaces.IConnection' _module: int _port: int - _lane_xindex: int + _serdes_xindex: int class GetDataAttr(ResponseBodyStruct): mode: LinkTrainingStatusMode = field(XmpByte()) @@ -2185,7 +2185,7 @@ def get(self) -> Token[GetDataAttr]: :rtype: PP_LINKTRAINSTATUS.GetDataAttr """ - return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._lane_xindex])) + return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex])) @register_command @dataclass From 4a7a449d9003e4e175505c5f37a6826e8c42c519 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:26:16 +0100 Subject: [PATCH 12/16] Fix docstring --- xoa_driver/internals/commands/p_commands.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xoa_driver/internals/commands/p_commands.py b/xoa_driver/internals/commands/p_commands.py index e1eb0087..a86e2989 100644 --- a/xoa_driver/internals/commands/p_commands.py +++ b/xoa_driver/internals/commands/p_commands.py @@ -629,7 +629,7 @@ class P_SPEEDSELECTION: .. note:: - This is only a settable command when speed is selected at the port level. Use the M_CFPCONFIGEXT` command when speed is selected at the module level. + This is only a settable command when speed is selected at the port level. Use the M_CFPCONFIGEXT command when speed is selected at the module level. """ From c1253d5eb942dec554db1eb380768e9a759c4786 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:26:51 +0100 Subject: [PATCH 13/16] Add PL1 commands of Freya --- xoa_driver/enums.py | 24 +- xoa_driver/internals/commands/enums.py | 276 ++++++++++ xoa_driver/internals/commands/pl1_commands.py | 513 +++++++++++++++++- 3 files changed, 810 insertions(+), 3 deletions(-) diff --git a/xoa_driver/enums.py b/xoa_driver/enums.py index 6c48f792..77e36c01 100644 --- a/xoa_driver/enums.py +++ b/xoa_driver/enums.py @@ -172,7 +172,17 @@ VlanType, ChassisModelNumber, ChassisModelName, - ModuleModelName + ModuleModelName, + FreyaAutonegMode, + FreyaLinkTrainingMode, + FreyaTecAbility, + FreyaFECAbility, + FreyaPauseAbility, + FreyaTechAbilityHCDStatus, + FreyaOutOfSyncPreset, + Layer1Control, + FreyaPCSVariant, + FreyaTecAbilityHCD, ) __all__ = ( @@ -347,5 +357,15 @@ "VlanType", "ChassisModelNumber", "ChassisModelName", - "ModuleModelName" + "ModuleModelName", + "FreyaAutonegMode", + "FreyaLinkTrainingMode", + "FreyaTecAbility", + "FreyaFECAbility", + "FreyaPauseAbility", + "FreyaTechAbilityHCDStatus", + "FreyaOutOfSyncPreset", + "Layer1Control", + "FreyaPCSVariant", + "FreyaTecAbilityHCD", ) diff --git a/xoa_driver/internals/commands/enums.py b/xoa_driver/internals/commands/enums.py index 6182cd9b..e6f058d4 100644 --- a/xoa_driver/internals/commands/enums.py +++ b/xoa_driver/internals/commands/enums.py @@ -2658,6 +2658,282 @@ class Endianness(IntEnum): REVERTED = 1 """Little Endian""" +class FreyaAutonegMode(IntEnum): + """Auto Neg Mode""" + + DISABLED = 0 + """Auto Neg Off""" + ENABLED = 1 + """Auto Neg On""" + +class FreyaLinkTrainingMode(IntEnum): + """Link Training Mode""" + + DISABLED = 0 + """Link training disabled""" + + ENABLED_AUTO = 1 + """Link training in auto mode""" + + ENABLED_INTERACTIVE = 2 + """Link training in interactive mode, requiring manual operation.""" + +class FreyaTecAbility(IntFlag): + """Auto Neg Technical Abilities""" + + ETC_800G_CR8_KR8 = 1<<29 + """ETC_800G_CR8_KR8""" + + ETC_400G_CR8_KR8 = 1<<28 + """ETC_400G_CR8_KR8""" + + ETC_50G_CR2 = 1<<27 + """ETC_50G_CR2""" + + ETC_50G_KR2 = 1<<26 + """ETC_50G_KR2""" + + ETC_25G_CR = 1<<25 + """ETC_25G_CR""" + + ETC_25G_KR = 1<<24 + """ETC_25G_KR""" + + IEEE_1_6TBASE_CR8_KR8 = 1<<23 + """IEEE_1_6TBASE_CR8_KR8""" + + IEEE_800GBASE_CR4_KR4 = 1<<22 + """IEEE_800GBASE_CR4_KR4""" + + IEEE_400GBASE_CR2_KR2 = 1<<21 + """IEEE_400GBASE_CR2_KR2""" + + IEEE_200GBASE_CR1_KR1 = 1<<20 + """IEEE_200GBASE_CR1_KR1""" + + IEEE_800GBASE_CR8_KR8 = 1<<19 + """IEEE_800GBASE_CR8_KR8""" + + IEEE_400GBASE_CR4_KR4 = 1<<18 + """IEEE_400GBASE_CR4_KR4""" + + IEEE_200GBASE_CR2_KR2 = 1<<17 + """IEEE_200GBASE_CR2_KR2""" + + IEEE_100GBASE_CR1_KR1 = 1<<16 + """IEEE_100GBASE_CR1_KR1""" + + IEEE_200GBASE_CR4_KR4 = 1<<15 + """IEEE_200GBASE_CR4_KR4""" + + IEEE_100GBASE_CR2_KR2 = 1<<14 + """IEEE_100GBASE_CR2_KR2""" + + IEEE_50GBASE_CR_KR = 1<<13 + """IEEE_50GBASE_CR_KR""" + + IEEE_5GBASE_KR = 1<<12 + """IEEE_5GBASE_KR""" + + IEEE_2_5GBASE_KX = 1<<11 + """IEEE_2_5GBASE_KX""" + + IEEE_25GBASE_CR_KR = 1<<10 + """IEEE_25GBASE_CR_KR""" + + IEEE_25GBASE_CR_S_KR_S = 1<<9 + """IEEE_25GBASE_CR_S_KR_S""" + + IEEE_100GBASE_CR4 = 1<<8 + """IEEE_100GBASE_CR4""" + + IEEE_100GBASE_KR4 = 1<<7 + """IEEE_100GBASE_KR4""" + + IEEE_100GBASE_KP4 = 1<<6 + """IEEE_100GBASE_KP4""" + + IEEE_100GBASE_CR10 = 1<<5 + """IEEE_100GBASE_CR10""" + + IEEE_40GBASE_CR4 = 1<<4 + """IEEE_40GBASE_CR4""" + + IEEE_40GBASE_KR4 = 1<<3 + """IEEE_40GBASE_KR4""" + + IEEE_10GBASE_KR = 1<<2 + """IEEE_10GBASE_KR""" + + IEEE_10GBASE_KX4 = 1<<1 + """IEEE_10GBASE_KX4""" + + IEEE_1000BASE_KX = 1<<0 + """IEEE_1000BASE_KX""" + +class FreyaFECAbility(IntFlag): + """Auto Neg FEC ability""" + + RS_FEC_Int = 1<<4 + """RS_FEC_Int""" + + FC_FEC_25G_REQUEST = 1<<3 + """FC_FEC_25G_REQUEST""" + + RS_FEC_25G_REQUEST = 1<<2 + """RS_FEC_25G_REQUEST""" + + FC_FEC_10G_REQUEST = 1<<1 + """FC_FEC_10G_REQUEST""" + + FC_FEC_10G_ABILITY = 1<<0 + """FC_FEC_10G_ABILITY""" + +class FreyaPauseAbility(IntFlag): + """Auto Neg Pause ability""" + + ASYM_PAUSE = 1<<1 + """ASYM_PAUSE""" + + SYM_PAUSE = 1<<0 + """SYM_PAUSE""" + +class FreyaTechAbilityHCDStatus(IntEnum): + """Auto Neg Pause ability""" + + SUCCESS = 1 + """SUCCESS""" + + FAILED = 2 + """FAILED""" + +class FreyaOutOfSyncPreset(IntEnum): + """Link Training out-of-sync preset""" + + IEEE = 0 + """IEEE""" + + CURRENT = 1 + """CURRENT""" + +class Layer1Control(IntEnum): + """Layer 1 control""" + + SAMPLED_SIGNAL_INTEGRITY_SCAN = 0 + """SAMPLED_SIGNAL_INTEGRITY_SCAN""" + + +class Layer1Opcode(IntEnum): + """Layer 1 operation code""" + + START_SCAN = 0 + """ for sampled eye scan""" + +class FreyaPCSVariant(IntEnum): + """PCS variant""" + + IEEE = 1 + """IEEE""" + + ETC = 2 + """ETC""" + +class FreyaTecAbilityHCD(IntEnum): + """Auto Neg Technical Abilities""" + + ETC_800G_CR8_KR8 = 29 + """ETC_800G_CR8_KR8""" + + ETC_400G_CR8_KR8 = 28 + """ETC_400G_CR8_KR8""" + + ETC_50G_CR2 = 27 + """ETC_50G_CR2""" + + ETC_50G_KR2 = 26 + """ETC_50G_KR2""" + + ETC_25G_CR = 25 + """ETC_25G_CR""" + + ETC_25G_KR = 24 + """ETC_25G_KR""" + + IEEE_1_6TBASE_CR8_KR8 = 23 + """IEEE_1_6TBASE_CR8_KR8""" + + IEEE_800GBASE_CR4_KR4 = 22 + """IEEE_800GBASE_CR4_KR4""" + + IEEE_400GBASE_CR2_KR2 = 21 + """IEEE_400GBASE_CR2_KR2""" + + IEEE_200GBASE_CR1_KR1 = 20 + """IEEE_200GBASE_CR1_KR1""" + + IEEE_800GBASE_CR8_KR8 = 19 + """IEEE_800GBASE_CR8_KR8""" + + IEEE_400GBASE_CR4_KR4 = 18 + """IEEE_400GBASE_CR4_KR4""" + + IEEE_200GBASE_CR2_KR2 = 17 + """IEEE_200GBASE_CR2_KR2""" + + IEEE_100GBASE_CR1_KR1 = 16 + """IEEE_100GBASE_CR1_KR1""" + + IEEE_200GBASE_CR4_KR4 = 15 + """IEEE_200GBASE_CR4_KR4""" + + IEEE_100GBASE_CR2_KR2 = 14 + """IEEE_100GBASE_CR2_KR2""" + + IEEE_50GBASE_CR_KR = 13 + """IEEE_50GBASE_CR_KR""" + + IEEE_5GBASE_KR = 12 + """IEEE_5GBASE_KR""" + + IEEE_2_5GBASE_KX = 11 + """IEEE_2_5GBASE_KX""" + + IEEE_25GBASE_CR_KR = 10 + """IEEE_25GBASE_CR_KR""" + + IEEE_25GBASE_CR_S_KR_S = 9 + """IEEE_25GBASE_CR_S_KR_S""" + + IEEE_100GBASE_CR4 = 8 + """IEEE_100GBASE_CR4""" + + IEEE_100GBASE_KR4 = 7 + """IEEE_100GBASE_KR4""" + + IEEE_100GBASE_KP4 = 6 + """IEEE_100GBASE_KP4""" + + IEEE_100GBASE_CR10 = 5 + """IEEE_100GBASE_CR10""" + + IEEE_40GBASE_CR4 = 4 + """IEEE_40GBASE_CR4""" + + IEEE_40GBASE_KR4 = 3 + """IEEE_40GBASE_KR4""" + + IEEE_10GBASE_KR = 2 + """IEEE_10GBASE_KR""" + + IEEE_10GBASE_KX4 = 1 + """IEEE_10GBASE_KX4""" + + IEEE_1000BASE_KX = 0 + """IEEE_1000BASE_KX""" + +# endregion + +# region misc enums class DhcpState(IntEnum): DHCP_STATE_UNKNOWN = 0 DHCP_STATE_RUNNING = 1 diff --git a/xoa_driver/internals/commands/pl1_commands.py b/xoa_driver/internals/commands/pl1_commands.py index b596909b..e1c1cba5 100644 --- a/xoa_driver/internals/commands/pl1_commands.py +++ b/xoa_driver/internals/commands/pl1_commands.py @@ -17,13 +17,34 @@ XmpInt, XmpSequence, XmpStr, + Hex, + XmpHex, ) from .enums import ( LinkTrainFrameLock, LinkTrainCmdResults, LinkTrainCmd, Layer1ConfigType, - OnOff + OnOff, + FreyaLinkTrainingMode, + FreyaAutonegMode, + FreyaTecAbility, + FreyaFECAbility, + FreyaPauseAbility, + AutoNegMode, + AutoNegStatus, + FreyaTechAbilityHCDStatus, + FECMode, + PauseMode, + FreyaOutOfSyncPreset, + TimeoutMode, + LinkTrainingStatusMode, + LinkTrainingStatus, + LinkTrainingFailureType, + Layer1Control, + Layer1Opcode, + FreyaPCSVariant, + FreyaTecAbilityHCD, ) @@ -404,3 +425,493 @@ def set(self, cmd: LinkTrainCmd, arg: int) -> Token[None]: """ return Token(self._connection, build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex], cmd=cmd, arg=arg)) + +@register_command +@dataclass +class PL1_CTRL: + """ + .. versionadded:: 2.5 + + The Signal Integrity feature offers the equivalent of an Equivalent Time oscilloscope trace of the RX PAM4 signal (later, also PAM2). The trace is done with the A/D converter in the GTM receiver also doing the data sampling / CDR function, i.e. the trace is taken after the RX equalizer. + + The HW characteristics of the Versal GTM used in Freya are: Trace length = 2000 samples, sample resolution = 7 bits 2's complement, i.e. range = -64..63. + + Using the sampled eye scan feature through CLI involves two steps: + + Trigger the acquisition of a trace (PL1_CTRL) + + Retrieve the trace data (PL1_GET_DATA) + + This command is a generic control function related to Layer 1 / SERDES. For now, only used for signal integrity scan. + """ + + code: typing.ClassVar[int] = 424 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + _serdes_xindex: int + _func_xindex: Layer1Control + + class SetDataAttr(RequestBodyStruct): + opcode: Layer1Opcode = field(XmpInt()) + + def set(self, opcode: Layer1Opcode) -> Token[None]: + + return Token(self._connection, build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex, self._func_xindex], opcode=opcode)) + +@register_command +@dataclass +class PL1_GET_DATA: + """ + .. versionadded:: 2.5 + + The Signal Integrity feature offers the equivalent of an Equivalent Time oscilloscope trace of the RX PAM4 signal (later, also PAM2). The trace is done with the A/D converter in the GTM receiver also doing the data sampling / CDR function, i.e. the trace is taken after the RX equalizer. + + The HW characteristics of the Versal GTM used in Freya are: Trace length = 2000 samples, sample resolution = 7 bits 2’s complement, i.e. range = -64..63. + + Using the sampled eye scan feature through CLI involves two steps: + + Trigger the acquisition of a trace (PL1_CTRL) + + Retrieve the trace data (PL1_GET_DATA) + + This command is a generic function to retrieve dynamic data related to Layer 1 / SERDES. For now, only used for signal integrity scan. + + For ``func==0``, sampled eye scan: + + * ``result==0``: No data available. + + "No data available" means that either a scan was never started, an acquisition was started and in progress, or the acquired data has become too old (e.g. older than 500 ms). The acquisition time for a trace is in the very low ms-range. If ``result==0``, ``sweep_no`` and ``age_us`` are dummy (=0), and no additional data are returned. + + * ``result==1``: Data returned. In that case, the rest of the parameters apply: + + ``sweep_no``: per-SERDES trace acquisition counter: 1,2,3… Each trace can be returned multiple times, to different users, within its lifetime. A new trace acquisition is triggered with the PL1_CTRL command. + + ``age_us``: The “age” of the trace data in microseconds, i.e. the time from data acquisition from hardware was completed until the time the command reply data is generated. + + ``value``: The rest of the reply is a set of 16 bit signed 2-complement sample values. With present hardware, the range of each sample is -64..63. In XMP scripting, each sample value is represented as two bytes, msb first. + + With present implementation, 2006 sample values (4012 bytes) are returned. + + The first 6 sample values are so-called “sampled levels”: < p3> + """ + + code: typing.ClassVar[int] = 425 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + _serdes_xindex: int + _func_xindex: Layer1Control + + class SetDataAttr(RequestBodyStruct): + result: int = field(XmpInt()) + """Data availability.""" + + sweep_no: int = field(XmpInt()) + """per-SERDES trace acquisition counter.""" + + age_us: int = field(XmpInt()) + """the age of the trace data in microseconds, i.e. the time from data acquisition from hardware was completed until the time the command reply data is generated.""" + + value: typing.List[int] = field(XmpSequence(types_chunk=[XmpByte()])) + """a set of 16 bit signed 2-complement sample values. With present hardware, the range of each sample is -64..63. In CLI scripting, each sample value is represented as two bytes, msb first.""" + + def set(self, opcode: Layer1Opcode) -> Token[None]: + + return Token(self._connection, build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex, self._func_xindex], opcode=opcode)) + +@register_command +@dataclass +class PL1_PHYTXEQ_LEVEL: + """ + .. versionadded:: 2.5 + + Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage). + + .. note:: + + PL1_PHYTXEQ, PL1_PHYTXEQ_LEVEL, and PL1_PHYTXEQ_COEFF facilitate the configuration and retrieval of TX tap values, each offering a unique perspective. Modifications made with any of these parameters will result in updates to the read results across all of them. + + """ + + code: typing.ClassVar[int] = 430 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + _serdes_xindex: int + + class GetDataAttr(ResponseBodyStruct): + pre3: int = field(XmpInt()) + """integer, pre3 tap value in dB/10, ranges from 0 to 71. Default = 0 (neutral)""" + pre2: int = field(XmpInt()) + """integer, pre2 tap value in dB/10, ranges from 0 to 71. Default = 0 (neutral)""" + pre: int = field(XmpInt()) + """integer, pre tap value in dB/10, ranges from 0 to 187. Default = 0 (neutral)""" + main: int = field(XmpInt()) + """integer, main tap value in mV, ranges from 507 to 998.""" + post: int = field(XmpInt()) + """integer, post tap value in dB/10, ranges from 0 to 187 Default = 0 (neutral)""" + + class SetDataAttr(RequestBodyStruct): + pre3: int = field(XmpInt()) + """integer, pre3 tap value in dB/10, ranges from 0 to 71. Default = 0 (neutral)""" + pre2: int = field(XmpInt()) + """integer, pre2 tap value in dB/10, ranges from 0 to 71. Default = 0 (neutral)""" + pre: int = field(XmpInt()) + """integer, pre tap value in dB/10, ranges from 0 to 187. Default = 0 (neutral)""" + main: int = field(XmpInt()) + """integer, main tap value in mV, ranges from 507 to 998.""" + post: int = field(XmpInt()) + """integer, post tap value in dB/10, ranges from 0 to 187 Default = 0 (neutral)""" + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex])) + + def set(self, pre3:int, pre2: int, pre: int, main: int, post: int) -> Token[None]: + + return Token( + self._connection, + build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex], pre3=pre3, pre2=pre2, pre=pre, main=main, post=post)) + +@register_command +@dataclass +class PL1_PHYTXEQ_COEFF: + """ + .. versionadded:: 2.5 + + Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage). + + .. note:: + + PL1_PHYTXEQ, PL1_PHYTXEQ_LEVEL, and PL1_PHYTXEQ_COEFF facilitate the configuration and retrieval of TX tap values, each offering a unique perspective. Modifications made with any of these parameters will result in updates to the read results across all of them. + + """ + + code: typing.ClassVar[int] = 431 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + _serdes_xindex: int + + class GetDataAttr(ResponseBodyStruct): + pre3: int = field(XmpInt()) + """integer, pre3 tap value, negative, scaled by 1E3. Default = 0 (neutral)""" + pre2: int = field(XmpInt()) + """integer, pre2 tap value, positive, scaled by 1E3. Default = 0 (neutral)""" + pre: int = field(XmpInt()) + """integer, pre tap value, negative, scaled by 1E3. Default = 0 (neutral)""" + main: int = field(XmpInt()) + """integer, main tap value, positive, scaled by 1E3. Default = 1000""" + post: int = field(XmpInt()) + """integer, post tap value, negative, scaled by 1E3. Default = 0 (neutral)""" + + class SetDataAttr(RequestBodyStruct): + pre3: int = field(XmpInt()) + """integer, pre3 tap value, negative, scaled by 1E3. Default = 0 (neutral)""" + pre2: int = field(XmpInt()) + """integer, pre2 tap value, positive, scaled by 1E3. Default = 0 (neutral)""" + pre: int = field(XmpInt()) + """integer, pre tap value, negative, scaled by 1E3. Default = 0 (neutral)""" + main: int = field(XmpInt()) + """integer, main tap value, positive, scaled by 1E3. Default = 1000""" + post: int = field(XmpInt()) + """integer, post tap value, negative, scaled by 1E3. Default = 0 (neutral)""" + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex])) + + def set(self, pre3:int, pre2: int, pre: int, main: int, post: int) -> Token[None]: + + return Token( + self._connection, + build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex], pre3=pre3, pre2=pre2, pre=pre, main=main, post=post)) + +@register_command +@dataclass +class PL1_AUTONEG_STATUS: + """ + .. versionadded:: 2.5 + + Returns received technology abilities, FEC abilities, pause abilities, HCD technology ability, FEC mode result, and pause mode result. + """ + + code: typing.ClassVar[int] = 432 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + + class GetDataAttr(ResponseBodyStruct): + mode: AutoNegMode = field(XmpInt()) + autoneg_state: AutoNegStatus = field(XmpInt()) + received_tech_abilities: Hex = field(XmpHex(size=8)) + received_fec_abilities: Hex = field(XmpHex(size=1)) + received_pause_mode: Hex = field(XmpHex(size=1)) + tech_ability_hcd_status: FreyaTechAbilityHCDStatus = field(XmpInt()) + tech_ability_hcd_value: FreyaTecAbilityHCD = field(XmpInt()) + fec_mode_result: FECMode = field(XmpInt()) + pause_mode_result: PauseMode = field(XmpInt()) + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port)) + +@register_command +@dataclass +class PL1_AUTONEG_ABILITIES: + """ + .. versionadded:: 2.5 + + Return the supported technology abilities, FEC abilities, and pause abilities of the port. + """ + + code: typing.ClassVar[int] = 433 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + + class GetDataAttr(ResponseBodyStruct): + tech_abilities_supported: Hex = field(XmpHex(size=8)) + """supported technology abilities by the port. This returns a value in Hex of the format 0xHHHHHHHH (64 bits). Each bit corresponds to technology ability as shown below. A bit of 1 means the corresponding technology ability is supported by the port.""" + + fec_modes_supported: Hex = field(XmpHex(size=1)) + """supported FEC modes by the port. This returns a value in Hex of the format 0xH (8 bits). Each bit corresponds to FEC mode as shown below. A bit of 1 means the corresponding FEC mode is supported by the port.""" + + pause_modes_supported: Hex = field(XmpHex(size=1)) + """pause abilities supported by the port. This returns a value in Hex of the format 0xH (8 bits). Each bit corresponds to pause mode as shown below. A bit of 1 means the corresponding FEC mode is supported by the port.""" + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port)) + +@register_command +@dataclass +class PL1_PCS_VARIANT: + """ + .. versionadded:: 2.5 + + PCS variant configuration. + """ + + code: typing.ClassVar[int] = 434 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + + class GetDataAttr(ResponseBodyStruct): + variant: FreyaPCSVariant = field(XmpByte()) + + class SetDataAttr(RequestBodyStruct): + variant: FreyaPCSVariant = field(XmpByte()) + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port)) + + def set(self, variant: FreyaPCSVariant) -> Token[None]: + + return Token(self._connection, build_set_request(self, module=self._module, port=self._port, variant=variant)) + + +@register_command +@dataclass +class PL1_AUTONEG_CONFIG: + """ + .. versionadded:: 2.5 + + Auto-negotiation configuration for Freya + """ + + code: typing.ClassVar[int] = 440 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + + class GetDataAttr(ResponseBodyStruct): + advertised_tech_abilities: Hex = field(XmpHex(size=8)) + advertised_fec_abilities: Hex = field(XmpHex(size=1)) + advertised_pause_mode: Hex = field(XmpHex(size=1)) + + class SetDataAttr(RequestBodyStruct): + advertised_tech_abilities: Hex = field(XmpHex(size=8)) + advertised_fec_abilities: Hex = field(XmpHex(size=1)) + advertised_pause_mode: Hex = field(XmpHex(size=1)) + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port)) + + def set(self, advertised_tech_abilities: Hex, advertised_fec_abilities: Hex, advertised_pause_mode: Hex) -> Token[None]: + + return Token(self._connection, build_set_request(self, module=self._module, port=self._port, advertised_tech_abilities=advertised_tech_abilities, advertised_fec_abilities=advertised_fec_abilities, advertised_pause_mode=advertised_pause_mode)) + +@register_command +@dataclass +class PL1_ANLT: + """ + .. versionadded:: 2.5 + + ANLT action + """ + + code: typing.ClassVar[int] = 441 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + + class GetDataAttr(ResponseBodyStruct): + an_mode: FreyaAutonegMode = field(XmpByte()) + + lt_mode: FreyaLinkTrainingMode = field(XmpByte()) + + class SetDataAttr(RequestBodyStruct): + an_mode: FreyaAutonegMode = field(XmpByte()) + + lt_mode: FreyaLinkTrainingMode = field(XmpByte()) + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port)) + + def set(self, an_mode: FreyaAutonegMode, lt_mode: FreyaLinkTrainingMode) -> Token[None]: + + return Token(self._connection, build_set_request(self, module=self._module, port=self._port, an_mode=an_mode, lt_mode=lt_mode)) + +@register_command +@dataclass +class PL1_PHYTXEQ: + """ + .. versionadded:: 2.5 + + Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage). + + .. note:: + + PL1_PHYTXEQ, PL1_PHYTXEQ_LEVEL, and PL1_PHYTXEQ_COEFF facilitate the configuration and retrieval of TX tap values, each offering a unique perspective. Modifications made with any of these parameters will result in updates to the read results across all of them. + + """ + + code: typing.ClassVar[int] = 442 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + _serdes_xindex: int + + class GetDataAttr(ResponseBodyStruct): + pre3: int = field(XmpInt()) + """integer, pre3 tap value. Default = 0 (neutral)""" + pre2: int = field(XmpInt()) + """integer, pre2 tap value. Default = 0 (neutral)""" + pre: int = field(XmpInt()) + """integer, pre tap value. Default = 0 (neutral)""" + main: int = field(XmpInt()) + """integer, main tap value.""" + post: int = field(XmpInt()) + """integer, post tap value. Default = 0 (neutral)""" + + class SetDataAttr(RequestBodyStruct): + pre3: int = field(XmpInt()) + """integer, pre3 tap value. Default = 0 (neutral)""" + pre2: int = field(XmpInt()) + """integer, pre2 tap value. Default = 0 (neutral)""" + pre: int = field(XmpInt()) + """integer, pre tap value. Default = 0 (neutral)""" + main: int = field(XmpInt()) + """integer, main tap value.""" + post: int = field(XmpInt()) + """integer, post tap value. Default = 0 (neutral)""" + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex])) + + def set(self, pre3:int, pre2: int, pre: int, main: int, post: int) -> Token[None]: + + return Token( + self._connection, + build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex], pre3=pre3, pre2=pre2, pre=pre, main=main, post=post)) + +@register_command +@dataclass +class PL1_LINKTRAIN_CONFIG: + """ + .. versionadded:: 2.5 + + Per-port link training settings + """ + + code: typing.ClassVar[int] = 443 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + + class GetDataAttr(ResponseBodyStruct): + oos_preset: FreyaOutOfSyncPreset = field(XmpByte()) + timeout_mode: TimeoutMode = field(XmpByte()) + + class SetDataAttr(RequestBodyStruct): + oos_preset: FreyaOutOfSyncPreset = field(XmpByte()) + timeout_mode: TimeoutMode = field(XmpByte()) + + def get(self) -> Token[GetDataAttr]: + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port)) + + def set(self, oos_preset: FreyaOutOfSyncPreset, timeout_mode: TimeoutMode) -> Token[None]: + + return Token(self._connection, build_set_request(self, module=self._module, port=self._port, oos_preset=oos_preset, timeout_mode=timeout_mode)) + +@register_command +@dataclass +class PL1_LINKTRAIN_STATUS: + """ + Per-lane link training status + """ + + code: typing.ClassVar[int] = 444 + pushed: typing.ClassVar[bool] = False + + _connection: 'interfaces.IConnection' + _module: int + _port: int + _serdes_xindex: int + + class GetDataAttr(ResponseBodyStruct): + mode: LinkTrainingStatusMode = field(XmpByte()) + """coded byte, link training mode""" + status: LinkTrainingStatus = field(XmpByte()) + """coded byte, lane status.""" + failure: LinkTrainingFailureType = field(XmpByte()) + """coded byte, failure type.""" + + def get(self) -> Token[GetDataAttr]: + """Get link training status of a lane of a port. + + :return: link training status of a lane of a port, including mode, lane status, and failure type. + :rtype: PP_LINKTRAINSTATUS.GetDataAttr + """ + + return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex])) \ No newline at end of file From 3fb447ac823dcb7638bb9717429b4281dbfe56f1 Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:26:59 +0100 Subject: [PATCH 14/16] Add SIV HLI --- .../hli_v1/ports/port_l23/pcs_pma_ghijkl.py | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py index 5e04cbdf..f801c52a 100644 --- a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py +++ b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py @@ -41,7 +41,10 @@ PP_PRECODING, PP_GRAYCODING, PP_PRECODINGSTATUS, + PL1_CTRL, + PL1_GET_DATA, ) +from xoa_driver import enums class PcsPmaAlarms: @@ -379,6 +382,21 @@ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes L23 high-speed port PRBS configuration. """ +class SivScan: + """Signal Integrity View""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.control = PL1_CTRL(conn, module_id, port_id, serdes_xindex, enums.Layer1Control.SAMPLED_SIGNAL_INTEGRITY_SCAN) + """Control SIV scan + + :type: PL1_CTRL + """ + + self.data = PL1_GET_DATA(conn, module_id, port_id, serdes_xindex, enums.Layer1Control.SAMPLED_SIGNAL_INTEGRITY_SCAN) + """Get SIV scan data + + :type: PL1_GET_DATA + """ class SerDes: """L23 high-speed port SerDes configuration and status.""" @@ -408,6 +426,10 @@ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes :type: SDPma """ + self.siv = SivScan(conn, module_id, port_id, serdes_xindex) + """Signal Integrity + """ + def __await__(self): return self._setup().__await__() From 238155f308198cb8069a34e88e23983432d6124f Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:27:26 +0100 Subject: [PATCH 15/16] Support freya 2.15 on ANLT HLFUNC --- xoa_driver/functions/anlt.py | 198 ++++++++++++++++++---------------- xoa_driver/functions/tools.py | 56 ++++++---- 2 files changed, 137 insertions(+), 117 deletions(-) diff --git a/xoa_driver/functions/anlt.py b/xoa_driver/functions/anlt.py index ae44a8a4..e28c32fd 100644 --- a/xoa_driver/functions/anlt.py +++ b/xoa_driver/functions/anlt.py @@ -4,7 +4,7 @@ from xoa_driver import enums from xoa_driver.utils import apply from xoa_driver.internals.hli_v1.ports.port_l23.family_l import FamilyL -from xoa_driver.internals.hli_v1.ports.port_l23.family_l1 import FamilyL1 +from xoa_driver.internals.hli_v1.ports.port_l23.family_l1 import FamilyFreya from xoa_driver.ports import GenericL23Port from xoa_driver.lli import commands from xoa_driver.internals.core import interfaces as itf @@ -20,8 +20,8 @@ ) import asyncio -PcsPmaSupported = (FamilyL, FamilyL1) -AutoNegSupported = (FamilyL, FamilyL1) +PcsPmaSupported = (FamilyL, FamilyFreya) +AutoNegSupported = (FamilyL, FamilyFreya) LinkTrainingSupported = FamilyL @@ -35,7 +35,7 @@ class DoAnlt: """should the port do link training?""" an_allow_loopback: bool """should the autoneg allow loopback?""" - lt_preset0: enums.NRZPreset + lt_preset0: enums.FreyaOutOfSyncPreset """out-of-sync tap values (preset 0): existing or standard""" lt_initial_modulations: dict[str, enums.LinkTrainEncoding] """the initial modulations of each serdes""" @@ -51,27 +51,26 @@ class DoAnlt: def __post_init__(self) -> None: self._group = get_ctx(self.port) - def __pp_autoneg(self, on: bool) -> Token: - state = enums.AutoNegMode.ANEG_ON if on else enums.AutoNegMode.ANEG_OFF - return commands.PP_AUTONEG(*self._group).set( - state, - enums.AutoNegTecAbility.DEFAULT_TECH_MODE, - enums.AutoNegFECOption.DEFAULT_FEC, - enums.AutoNegFECOption.DEFAULT_FEC, - enums.PauseMode.NO_PAUSE, - ) + # def __pp_autoneg(self, on: bool) -> Token: + # state = enums.FreyaAutonegMode.ENABLED if on else enums.FreyaAutonegMode.DISABLED + # return commands.PL1_AUTONEG_CONFIG(*self._group).set( + + # ) + # return commands.PP_AUTONEG(*self._group).set( + # state, + # enums.AutoNegTecAbility.DEFAULT_TECH_MODE, + # enums.AutoNegFECOption.DEFAULT_FEC, + # enums.AutoNegFECOption.DEFAULT_FEC, + # enums.PauseMode.NO_PAUSE, + # ) - def __pp_link_train( + def __pl1_linktrain_config( self, - mode: enums.LinkTrainingMode, - nrz_preset: enums.NRZPreset, + ooo_preset: enums.FreyaOutOfSyncPreset, timeout_mode: enums.TimeoutMode, ) -> Token: - return commands.PP_LINKTRAIN(*self._group).set( - mode=mode, - pam4_frame_size=enums.PAM4FrameSize.P16K_FRAME, - nrz_pam4_init_cond=enums.LinkTrainingInitCondition.NO_INIT, - nrz_preset=nrz_preset, + return commands.PL1_LINKTRAIN_CONFIG(*self._group).set( + oos_preset=ooo_preset, timeout_mode=timeout_mode, ) @@ -81,40 +80,49 @@ def __pl1_cfg_tmp( return commands.PL1_CFG_TMP(*self._group, serdes, config_type).set( values=values ) + + def __pl1_anlt( + self, + an_mode: enums.FreyaAutonegMode, + lt_mode: enums.FreyaLinkTrainingMode, + ) -> Token: + return commands.PL1_ANLT(*self._group).set( + an_mode=an_mode, + lt_mode=lt_mode, + ) - def __select_modes(self) -> tuple[enums.LinkTrainingMode, enums.TimeoutMode]: - if self.should_do_an == True and self.should_lt_interactive == False and self.should_enable_lt_timeout == False: - lt_mode = enums.LinkTrainingMode.START_AFTER_AUTONEG - timeout_mode = enums.TimeoutMode.DISABLED - elif self.should_do_an == True and self.should_lt_interactive == False and self.should_enable_lt_timeout == True: - lt_mode = enums.LinkTrainingMode.START_AFTER_AUTONEG - timeout_mode = enums.TimeoutMode.DEFAULT - elif self.should_do_an == True and self.should_lt_interactive == True: - lt_mode = enums.LinkTrainingMode.INTERACTIVE - timeout_mode = enums.TimeoutMode.DISABLED - elif self.should_do_an == False and self.should_lt_interactive == False and self.should_enable_lt_timeout == False: - lt_mode = enums.LinkTrainingMode.STANDALONE - timeout_mode = enums.TimeoutMode.DISABLED - elif self.should_do_an == False and self.should_lt_interactive == False and self.should_enable_lt_timeout == True: - lt_mode = enums.LinkTrainingMode.STANDALONE - timeout_mode = enums.TimeoutMode.DEFAULT - elif self.should_do_an == False and self.should_lt_interactive == True: - lt_mode = enums.LinkTrainingMode.INTERACTIVE - timeout_mode = enums.TimeoutMode.DISABLED + def __select_modes(self) -> tuple[enums.FreyaAutonegMode, enums.FreyaLinkTrainingMode, enums.TimeoutMode]: + if self.should_do_an == True: + _an_mode = enums.FreyaAutonegMode.ENABLED + else: + _an_mode = enums.FreyaAutonegMode.DISABLED + if self.should_do_lt == True: + # LT interactive must always disable LT timeout + if self.should_lt_interactive == True: + _lt_mode = enums.FreyaLinkTrainingMode.ENABLED_INTERACTIVE + _timeout_mode = enums.TimeoutMode.DISABLED + # For LT auto, you can either enable LT timeout or disable LT timeout + elif self.should_enable_lt_timeout == True: + _lt_mode = enums.FreyaLinkTrainingMode.ENABLED_AUTO + _timeout_mode = enums.TimeoutMode.DEFAULT + else: + _lt_mode = enums.FreyaLinkTrainingMode.ENABLED_AUTO + _timeout_mode = enums.TimeoutMode.DISABLED else: - lt_mode = enums.LinkTrainingMode.STANDALONE - timeout_mode = enums.TimeoutMode.DEFAULT - return lt_mode, timeout_mode + _lt_mode = enums.FreyaLinkTrainingMode.DISABLED + _timeout_mode = enums.TimeoutMode.DISABLED + + return _an_mode, _lt_mode, _timeout_mode def __builder__(self) -> t.Generator[Token, None, None]: """Defining commands sequence""" - nrz_preset = self.lt_preset0 + # # Set autoneg timeout - yield self.__pp_link_train( - enums.LinkTrainingMode.DISABLED, - enums.NRZPreset.NRZ_NO_PRESET, - enums.TimeoutMode.DEFAULT, - ) + # yield self.__pl1_linktrain_config( + # enums.LinkTrainingMode.DISABLED, + # enums.NRZPreset.NRZ_NO_PRESET, + # enums.TimeoutMode.DEFAULT, + # ) # # Set autoneg allow-loopback yield self.__pl1_cfg_tmp( @@ -124,28 +132,33 @@ def __builder__(self) -> t.Generator[Token, None, None]: # yield self.__pp_autoneg(self.should_do_an and not self.should_do_lt) # if (not self.should_do_an) or self.should_do_lt: # Disable autoneg - yield self.__pp_autoneg(False) - - if self.should_do_lt: - for serdes_str, algorithm in self.lt_algorithm.items(): - # # Set the link train algorithm - yield self.__pl1_cfg_tmp( - int(serdes_str), enums.Layer1ConfigType.LT_TRAINING_ALGORITHM, [algorithm.value] - ) - - for serdes_str, im in self.lt_initial_modulations.items(): - yield self.__pl1_cfg_tmp( - int(serdes_str), enums.Layer1ConfigType.LT_INITIAL_MODULATION, [im.value] - ) - - lt_mode, timeout_mode = self.__select_modes() - yield self.__pp_link_train( - enums.LinkTrainingMode.DISABLED, nrz_preset, timeout_mode + # yield self.__pp_autoneg(False) + + # Set the link train algorithm + for serdes_str, algorithm in self.lt_algorithm.items(): + yield self.__pl1_cfg_tmp( + int(serdes_str), enums.Layer1ConfigType.LT_TRAINING_ALGORITHM, [algorithm.value] + ) + # Set the link train initial modulation + for serdes_str, im in self.lt_initial_modulations.items(): + yield self.__pl1_cfg_tmp( + int(serdes_str), enums.Layer1ConfigType.LT_INITIAL_MODULATION, [im.value] ) - yield self.__pp_link_train(lt_mode, nrz_preset, timeout_mode) - if self.should_do_an: - yield self.__pp_autoneg(True) + # Get the mode + _an_mode, _lt_mode, _timeout_mode = self.__select_modes() + + # Set link train config + _ooo_preset = self.lt_preset0 + yield self.__pl1_linktrain_config( + _ooo_preset, _timeout_mode + ) + + # Start AN/LT + yield self.__pl1_anlt( + _an_mode, _lt_mode + ) + async def run(self) -> None: """Start anlt execution""" @@ -157,14 +170,14 @@ async def anlt_start( should_do_an: bool, should_do_lt: bool, an_allow_loopback: bool, - lt_preset0: enums.NRZPreset, + lt_preset0: enums.FreyaOutOfSyncPreset, lt_initial_modulations: dict[str, enums.LinkTrainEncoding], should_lt_interactive: bool, lt_algorithm: dict[str, enums.LinkTrainAlgorithm], should_enable_lt_timeout: bool, ) -> None: """ - .. versionadded:: 1.1 + .. versionchanged:: 2.5 Start ANLT on a port @@ -177,7 +190,7 @@ async def anlt_start( :param an_allow_loopback: should the autoneg allow loopback? :type an_allow_loopback: bool :param lt_preset0: out-of-sync tap values (preset 0): existing or standard - :type lt_preset0: enums.NRZPreset + :type lt_preset0: enums.FreyaOutOfSyncPreset :param lt_initial_modulations: the initial modulations of each serdes :type lt_initial_modulations: typing.Dict[str, enums.LinkTrainEncoding] :param should_lt_interactive: should perform link training manually? @@ -204,7 +217,7 @@ async def anlt_start( async def autoneg_status(port: GenericL23Port) -> dict[str, t.Any]: """ - .. versionadded:: 1.1 + .. versionchanged:: 2.5 Get the auto-negotiation status @@ -219,7 +232,7 @@ async def autoneg_status(port: GenericL23Port) -> dict[str, t.Any]: conn, mid, pid, 0, enums.Layer1ConfigType.AN_LOOPBACK ).get(), commands.PL1_AUTONEGINFO(conn, mid, pid, 0).get(), - commands.PP_AUTONEGSTATUS(conn, mid, pid).get(), + commands.PL1_AUTONEG_STATUS(conn, mid, pid).get(), ) return dictionize_autoneg_status(loopback, auto_neg_info, status) @@ -294,6 +307,7 @@ async def lt_coeff_dec( """ return await __lt_coeff(port, serdes, emphasis, cmd=enums.LinkTrainCmd.CMD_DEC) + async def lt_coeff_no_eq( port: GenericL23Port, serdes: int, @@ -384,7 +398,7 @@ async def lt_trained(port: GenericL23Port, serdes: int) -> enums.LinkTrainCmdRes async def lt_status(port: GenericL23Port, serdes: int) -> dict[str, t.Any]: """ - .. versionadded:: 1.1 + .. versionchanged:: 2.5 Show the link training status. @@ -397,9 +411,9 @@ async def lt_status(port: GenericL23Port, serdes: int) -> dict[str, t.Any]: """ conn, mid, pid = get_ctx(port) status, info, ltconf, cfg = await apply( - commands.PP_LINKTRAINSTATUS(conn, mid, pid, serdes).get(), + commands.PL1_LINKTRAIN_STATUS(conn, mid, pid, serdes).get(), commands.PL1_LINKTRAININFO(conn, mid, pid, serdes, 0).get(), - commands.PP_LINKTRAIN(conn, mid, pid).get(), + commands.PL1_LINKTRAIN_CONFIG(conn, mid, pid).get(), commands.PL1_CFG_TMP( conn, mid, pid, serdes, enums.Layer1ConfigType.LT_INITIAL_MODULATION ).get(), @@ -502,6 +516,8 @@ async def anlt_link_recovery(port: GenericL23Port, restart_link_down: bool, rest async def anlt_status(port: GenericL23Port) -> dict[str, t.Any]: """ + .. versionchanged:: 2.5 + Get the overview of ANLT status :param port: the port object @@ -513,18 +529,17 @@ async def anlt_status(port: GenericL23Port) -> dict[str, t.Any]: # if not isinstance(port, LinkTrainingSupported): # raise NotSupportLinkTrainError(port) conn, mid, pid = get_ctx(port) - r = await apply( + _link_recovery, _anlt_op, _linktrain_cfg, _capabilities, _allow_loopback = await apply( commands.PL1_CFG_TMP( conn, mid, pid, 0, enums.Layer1ConfigType.AUTO_LINK_RECOVERY ).get(), - commands.PP_AUTONEGSTATUS(conn, mid, pid).get(), - commands.PP_LINKTRAIN(conn, mid, pid).get(), + commands.PL1_ANLT(conn, mid, pid).get(), + commands.PL1_LINKTRAIN_CONFIG(conn, mid, pid).get(), commands.P_CAPABILITIES(conn, mid, pid).get(), commands.PL1_CFG_TMP(conn, mid, pid, 0, enums.Layer1ConfigType.AN_LOOPBACK).get(), ) - link_recovery, autoneg, linktrain, capabilities, allow_loopback = r - return dictionize_anlt_status(link_recovery, autoneg, linktrain, capabilities, allow_loopback) + return dictionize_anlt_status(_link_recovery, _anlt_op, _linktrain_cfg, _capabilities, _allow_loopback) async def anlt_log(port: GenericL23Port) -> str: @@ -545,26 +560,19 @@ async def anlt_log(port: GenericL23Port) -> str: async def anlt_stop(port: GenericL23Port) -> None: """ - .. versionadded:: 1.3 + .. versionchanged:: 2.5 Stop AN & LT :param port: the port object :type port: :class:`~xoa_driver.ports.GenericL23Port` """ + conn, mid, pid = get_ctx(port) - anlt = DoAnlt( - port=port, - should_do_an=False, - should_do_lt=False, - an_allow_loopback=False, - lt_preset0=enums.NRZPreset.NRZ_NO_PRESET, - lt_initial_modulations={}, - should_lt_interactive=False, - lt_algorithm={}, - should_enable_lt_timeout=True, - ) - await anlt.run() + await commands.PL1_ANLT(conn, mid, pid).set( + an_mode=enums.FreyaAutonegMode.DISABLED, + lt_mode=enums.FreyaLinkTrainingMode.DISABLED + ) async def txtap_autotune(port: GenericL23Port, serdes: int) -> None: diff --git a/xoa_driver/functions/tools.py b/xoa_driver/functions/tools.py index 9e605e16..c0da5dc6 100644 --- a/xoa_driver/functions/tools.py +++ b/xoa_driver/functions/tools.py @@ -14,12 +14,21 @@ def get_ctx(port: GenericAnyPort) -> tuple["itf.IConnection", int, int]: def dictionize_autoneg_status( loopback: commands.PL1_CFG_TMP.GetDataAttr, auto_neg_info: commands.PL1_AUTONEGINFO.GetDataAttr, - status: commands.PP_AUTONEGSTATUS.GetDataAttr, + status: commands.PL1_AUTONEG_STATUS.GetDataAttr, ) -> dict[str, Any]: - is_enabled = True if status.mode == enums.AutoNegMode.ANEG_ON else False + _is_enabled = True if status.mode == enums.AutoNegMode.ANEG_ON else False + _ta_hcd_status = status.tech_ability_hcd_status + if _ta_hcd_status == enums.FreyaTechAbilityHCDStatus.FAILED: + _ta_hcd_value = "N/A" + _fec_result_value = "N/A" + else: + _ta_hcd_value = status.tech_ability_hcd_value.name + _fec_result_value = status.fec_mode_result.name return { - "is_enabled": is_enabled, + "is_enabled": _is_enabled, "loopback": "allowed" if loopback.values[0] else "not allowed", + "hcd": _ta_hcd_value, + "fec_result": _fec_result_value, "duration": auto_neg_info.duration_us, "successes": auto_neg_info.negotiation_success_count, "timeouts": auto_neg_info.negotiation_timeout_count, @@ -79,33 +88,36 @@ def _link_info_all(info: commands.PL1_LINKTRAININFO.GetDataAttr, index: str) -> def dictionize_lt_status( - status: commands.PP_LINKTRAINSTATUS.GetDataAttr, + status: commands.PL1_LINKTRAIN_STATUS.GetDataAttr, info: commands.PL1_LINKTRAININFO.GetDataAttr, - ltconf: commands.PP_LINKTRAIN.GetDataAttr, + ltconf: commands.PL1_LINKTRAIN_CONFIG.GetDataAttr, cfg: commands.PL1_CFG_TMP.GetDataAttr, ber: float, total_bit_count: float, total_error_bit_count: float, ) -> dict[str, Any]: - is_enabled = True if status.mode == enums.LinkTrainingStatusMode.ENABLED else False - is_traind = True if status.status == enums.LinkTrainingStatus.TRAINED else False - preset0 = "Existing tap values" if ltconf.nrz_preset == enums.NRZPreset.NRZ_WITH_PRESET else "Standard tap values" + _is_enabled = True if status.mode == enums.LinkTrainingStatusMode.ENABLED else False + _is_traind = True if status.status == enums.LinkTrainingStatus.TRAINED else False + _oos_preset = "Existing" if ltconf.oos_preset == enums.FreyaOutOfSyncPreset.CURRENT else "IEEE" ber_str = '{:.2e}'.format(ber) return { - "is_enabled": is_enabled, - "is_trained": is_traind, - "failure": enums.LinkTrainingFailureType(status.failure).name.lower(), - "preset0": preset0, + "is_enabled": _is_enabled, + "is_trained": _is_traind, + # "failure": enums.LinkTrainingFailureType(status.failure).name.lower(), + "failure": status.failure.name.lower(), + "oos_preset": _oos_preset, "init_modulation": enums.LinkTrainEncoding(cfg.values[0]).name.lower(), "total_bits": total_bit_count, "total_errored_bits": total_error_bit_count, "ber": ber_str, "duration": info.duration_us, "lock_lost": info.lock_lost_count, - "frame_lock": enums.LinkTrainFrameLock(info.frame_lock).name.lower(), - "remote_frame_lock": enums.LinkTrainFrameLock( - info.remote_frame_lock - ).name.lower(), + # "frame_lock": enums.LinkTrainFrameLock(info.frame_lock).name.lower(), + "frame_lock": info.frame_lock.name.lower(), + # "remote_frame_lock": enums.LinkTrainFrameLock( + # info.remote_frame_lock + # ).name.lower(), + "remote_frame_lock": info.remote_frame_lock.name.lower(), "frame_errors": info.num_frame_errors, "overrun_errors": info.num_overruns, "last_ic_received": _decode_ic(info.last_ic_received), @@ -130,20 +142,20 @@ def dictionize_txtap_get(r: commands.PP_PHYTXEQ.GetDataAttr) -> dict[str, int]: def dictionize_anlt_status( link_recovery: commands.PL1_CFG_TMP.GetDataAttr, - autoneg: commands.PP_AUTONEGSTATUS.GetDataAttr, - linktrain: commands.PP_LINKTRAIN.GetDataAttr, + anlt_op: commands.PL1_ANLT.GetDataAttr, + linktrain_cfg: commands.PL1_LINKTRAIN_CONFIG.GetDataAttr, capabilities: commands.P_CAPABILITIES.GetDataAttr, allow_loopback: commands.PL1_CFG_TMP.GetDataAttr, ) -> dict[str, Any]: return { - "autoneg_enabled": enums.AutoNegMode(autoneg.mode).name.lower().lstrip("aneg_"), - "link_training_mode": enums.LinkTrainingMode(linktrain.mode).name.lower(), - "link_training_timeout": "enable" if linktrain.timeout_mode == enums.TimeoutMode.DEFAULT else "disable", + "autoneg_mode": anlt_op.an_mode.name.lower(), + "link_training_mode": anlt_op.lt_mode.name.lower(), + "link_training_timeout": "enable" if linktrain_cfg.timeout_mode == enums.TimeoutMode.DEFAULT else "disable", "restart_link_down": "on" if link_recovery.values[0] == 1 or link_recovery.values[0] == 3 else "off", "restart_lt_fail": "on" if link_recovery.values[0] == 2 or link_recovery.values[0] == 3 else "off", "serdes_count": capabilities.serdes_count, "autoneg_allow_loopback": allow_loopback.values, - "link_training_preset0": enums.NRZPreset(linktrain.nrz_preset).name.lower(), + "link_training_preset0": enums.FreyaOutOfSyncPreset(linktrain_cfg.oos_preset).name.lower(), } From 816c92bf493bb6b518161741fcd5e061359cc78e Mon Sep 17 00:00:00 2001 From: Leonard Yu Date: Wed, 6 Mar 2024 15:27:38 +0100 Subject: [PATCH 16/16] Update user manual --- docs/source/api_ref/hlapiv1/index.rst | 2 +- docs/source/api_ref/hlapiv1/module/vulcan/index.rst | 2 +- docs/source/api_ref/hlapiv1/port/vulcan/index.rst | 2 +- docs/source/api_ref/hlfunc/index.rst | 2 +- docs/source/api_ref/llapi/impairment/index.rst | 2 +- docs/source/api_ref/llapi/index.rst | 2 +- docs/source/api_ref/llapi/l23/index.rst | 2 +- docs/source/api_ref/llapi/l47/index.rst | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/docs/source/api_ref/hlapiv1/index.rst b/docs/source/api_ref/hlapiv1/index.rst index 6e71a781..7c976efd 100644 --- a/docs/source/api_ref/hlapiv1/index.rst +++ b/docs/source/api_ref/hlapiv1/index.rst @@ -1,4 +1,4 @@ -🚀 High-Level API +High-Level API ======================== HL-API uses the classes defined in LL-API and lets you quickly develop scripts or program in an **object-oriented** fashion with explicit definition of commands of different *tester*, *module*, *port* types. In addition, the HL-API layer provides functionalities such as: diff --git a/docs/source/api_ref/hlapiv1/module/vulcan/index.rst b/docs/source/api_ref/hlapiv1/module/vulcan/index.rst index 90dac3e0..e4c12a6d 100644 --- a/docs/source/api_ref/hlapiv1/module/vulcan/index.rst +++ b/docs/source/api_ref/hlapiv1/module/vulcan/index.rst @@ -1,4 +1,4 @@ -Vulcan +L47 ========================= .. note:: diff --git a/docs/source/api_ref/hlapiv1/port/vulcan/index.rst b/docs/source/api_ref/hlapiv1/port/vulcan/index.rst index 4bb79efa..b27a3e9a 100644 --- a/docs/source/api_ref/hlapiv1/port/vulcan/index.rst +++ b/docs/source/api_ref/hlapiv1/port/vulcan/index.rst @@ -1,4 +1,4 @@ -Vulcan +L47 ========================= .. note:: diff --git a/docs/source/api_ref/hlfunc/index.rst b/docs/source/api_ref/hlfunc/index.rst index 017ba72a..aef33ee0 100644 --- a/docs/source/api_ref/hlfunc/index.rst +++ b/docs/source/api_ref/hlfunc/index.rst @@ -1,4 +1,4 @@ -🎨 High-Level Functions +High-Level Functions =============================== HL-FUNC provides high-level abstraction functions on top of the object-oriented HL-API, aiming to help you simplify code logics and increase readability and maintainability. diff --git a/docs/source/api_ref/llapi/impairment/index.rst b/docs/source/api_ref/llapi/impairment/index.rst index 093421e1..cd49d43c 100644 --- a/docs/source/api_ref/llapi/impairment/index.rst +++ b/docs/source/api_ref/llapi/impairment/index.rst @@ -1,4 +1,4 @@ -Chimera +Impairment ============================= .. toctree:: diff --git a/docs/source/api_ref/llapi/index.rst b/docs/source/api_ref/llapi/index.rst index f8fb7486..49408c3a 100644 --- a/docs/source/api_ref/llapi/index.rst +++ b/docs/source/api_ref/llapi/index.rst @@ -1,4 +1,4 @@ -🧱 Low-Level API +Low-Level API ========================= LL-API contains low-level API classes, giving you the direct control of the tester. The names of the classes are the same as the the CLI commands in :term:`XOA CLI`, making it easy for you to understand the Python API if you are already familiar with XOA CLI. diff --git a/docs/source/api_ref/llapi/l23/index.rst b/docs/source/api_ref/llapi/l23/index.rst index d02cc787..3dda17f3 100644 --- a/docs/source/api_ref/llapi/l23/index.rst +++ b/docs/source/api_ref/llapi/l23/index.rst @@ -1,4 +1,4 @@ -Valkyrie +TGA & L1 ========================= .. toctree:: diff --git a/docs/source/api_ref/llapi/l47/index.rst b/docs/source/api_ref/llapi/l47/index.rst index 85368b9a..75c43e24 100644 --- a/docs/source/api_ref/llapi/l47/index.rst +++ b/docs/source/api_ref/llapi/l47/index.rst @@ -1,4 +1,4 @@ -Vulcan +L47 ========================= .. toctree::