diff --git a/docs/source/api_ref/hlapiv1/port/freya/anlt/an.rst b/docs/source/api_ref/hlapiv1/port/freya/anlt/an.rst new file mode 100644 index 00000000..ff5a262c --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/anlt/an.rst @@ -0,0 +1,65 @@ +Auto-Negotiation +========================= + +Abilities +--------- + +Return supported technology abilities, supported FEC modes, and supported pause modes. + +.. code-block:: python + + resp = await port.l1.anlt.an.abilities.get() + resp.fec_modes_supported + resp.tech_abilities_supported + resp.pause_modes_supported + + +Configuration +------------- + +Configure the advertised technology abilities, FEC modes, and pause modes. + +.. code-block:: python + + await port.l1.anlt.an.abilities.set(, , ) + + +Status +--------- + +Returns received technology abilities, FEC abilities, pause abilities, HCD technology ability, FEC mode result, and pause mode result. + +.. code-block:: python + + resp = await port.l1.anlt.an.status.get() + resp.mode + resp.autoneg_state + resp.received_tech_abilities + resp.received_fec_abilities + resp.received_pause_mode + resp.tech_ability_hcd_status + resp.tech_ability_hcd_value + resp.fec_mode_result + resp.pause_mode_result + +Info +--------- + +Get L1 auto-negotiation information. + +.. code-block:: python + + resp = await port.l1.anlt.an.info.get() + resp.rx_link_codeword_count + resp.rx_next_page_message_count + resp.rx_next_page_unformatted_count + resp.tx_link_codeword_count + resp.tx_next_page_message_count + resp.tx_next_page_unformatted_count + resp.negotiation_hcd_fail_count + resp.negotiation_fec_fail_count + resp.negotiation_loss_of_sync_count + resp.negotiation_timeout_count + resp.negotiation_success_count + resp.duration_us + diff --git a/docs/source/api_ref/hlapiv1/port/freya/anlt/ctrl.rst b/docs/source/api_ref/hlapiv1/port/freya/anlt/ctrl.rst new file mode 100644 index 00000000..460169db --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/anlt/ctrl.rst @@ -0,0 +1,13 @@ +Control +======= + +Enable/disable AN and LT + +.. code-block:: python + + await port.l1.anlt.ctrl.enable_an_lt_auto() + await port.l1.anlt.ctrl.disable_anlt() + await port.l1.anlt.ctrl.enable_an_lt_interactive() + await port.l1.anlt.ctrl.enable_an_only() + await port.l1.anlt.ctrl.enable_an_lt_auto() + await port.l1.anlt.ctrl.enable_lt_interactive_only() \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/anlt/index.rst b/docs/source/api_ref/hlapiv1/port/freya/anlt/index.rst new file mode 100644 index 00000000..82a4bd05 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/anlt/index.rst @@ -0,0 +1,7 @@ +ANLT +===== + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/anlt/log.rst b/docs/source/api_ref/hlapiv1/port/freya/anlt/log.rst new file mode 100644 index 00000000..cbdb50a2 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/anlt/log.rst @@ -0,0 +1,9 @@ +Log +=========================== + +Get ANLT log trace. The log trace is a JSON string. + +.. code-block:: python + + resp = await port.l1.anlt.log.get() + resp.log_string \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/anlt/lt.rst b/docs/source/api_ref/hlapiv1/port/freya/anlt/lt.rst new file mode 100644 index 00000000..82f54e91 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/anlt/lt.rst @@ -0,0 +1,186 @@ +Link Training +========================= + +Configuration +------------------------- + +Configuration LT out-of-sync preset and timeout + +.. code-block:: python + + await port.l1.anlt.lt_config.set(oos_preset=enums.FreyaOutOfSyncPreset.CURRENT, timeout_mode=enums.TimeoutMode.DEFAULT) + await port.l1.anlt.lt_config.set(oos_preset=enums.FreyaOutOfSyncPreset.CURRENT, timeout_mode=enums.TimeoutMode.DISABLED) + await port.l1.anlt.lt_config.set(oos_preset=enums.FreyaOutOfSyncPreset.IEEE, timeout_mode=enums.TimeoutMode.DEFAULT) + await port.l1.anlt.lt_config.set(oos_preset=enums.FreyaOutOfSyncPreset.IEEE, timeout_mode=enums.TimeoutMode.DISABLED) + +Status +------ + +Get link training status. + +.. code-block:: python + + resp = await port.l1.serdes[0].lt_status.get() + resp.failure + resp.mode + resp.status + +Info +----- + +Get link training result info. + +.. code-block:: python + + resp = await port.l1.serdes[0].lt_info.get() + resp.duration_us + """duration of the auto-negotiation process in microseconds, from autoneg is enabled on the port to the negotiation is finished.""" + resp.lock_lost_count: + """number of lost locks on auto-neg.""" + resp.pre1_current_level: + """c(-1) current level.""" + resp.pre1_rx_increment_req_count: + """c(-1) received number of increment requests.""" + resp.pre1_rx_decrement_req_count: + """c(-1) received number of decrement requests.""" + resp.pre1_rx_coeff_eq_limit_reached_count: + """c(-1) received number of maximum limits of coefficient and equalization requests reached.""" + resp.pre1_rx_eq_limit_reached_count: + """c(-1) received number of maximum limits of equalization requests reached.""" + resp.pre1_rx_coeff_not_supported_count: + """c(-1) received number of coefficients not supported.""" + resp.pre1_rx_coeff_at_limit_count: + """c(-1) received number of coefficients at limit.""" + resp.pre1_tx_increment_req_count: + """c(-1) transmitted number of increment requests.""" + resp.pre1_tx_decrement_req_count: + """c(-1) transmitted number of decrement requests.""" + resp.pre1_tx_coeff_eq_limit_reached_count: + """c(-1) transmitted number of maximum limits of coefficient and equalization requests reached.""" + resp.pre1_tx_eq_limit_reached_count: + """c(-1) transmitted number of maximum limits of equalization requests reached.""" + resp.pre1_tx_coeff_not_supported_count: + """c(-1) transmitted number of coefficients not supported.""" + resp.pre1_tx_coeff_at_limit_count: + """c(-1) transmitted number of coefficients at limit.""" + resp.main_current_level: + """c(0) current level.""" + resp.main_rx_increment_req_count: + """c(0) received number of increment requests.""" + resp.main_rx_decrement_req_count: + """c(0) received number of decrement requests.""" + resp.main_rx_coeff_eq_limit_reached_count: + """c(0) received number of maximum limits of coefficient and equalization requests reached.""" + resp.main_rx_eq_limit_reached_count: + """c(0) received number of maximum limits of equalization requests reached.""" + resp.main_rx_coeff_not_supported_count: + """c(0) received number of coefficients not supported.""" + resp.main_rx_coeff_at_limit_count: + """c(0) received number of coefficients at limit.""" + resp.main_tx_increment_req_count: + """c(0) transmitted number of increment requests.""" + resp.main_tx_decrement_req_count: + """c(0) transmitted number of decrement requests.""" + resp.main_tx_coeff_eq_limit_reached_count: + """c(0) transmitted number of maximum limits of coefficient and equalization requests reached.""" + resp.main_tx_eq_limit_reached_count: + """c(0) transmitted number of maximum limits of equalization requests reached.""" + resp.main_tx_coeff_not_supported_count: + """c(0) transmitted number of coefficients not supported.""" + resp.main_tx_coeff_at_limit_count: + """c(0) transmitted number of coefficients at limit.""" + resp.post1_current_level: + """c(1) current level.""" + resp.post1_rx_increment_req_count: + """c(1) received number of increment requests.""" + resp.post1_rx_decrement_req_count: + """c(1) received number of decrement requests.""" + resp.post1_rx_coeff_eq_limit_reached_count: + """c(1) received number of maximum limits of coefficient and equalization requests reached.""" + resp.post1_rx_eq_limit_reached_count: + """c(1) received number of maximum limits of equalization requests reached.""" + resp.post1_rx_coeff_not_supported_count: + """c(1) received number of coefficients not supported.""" + resp.post1_rx_coeff_at_limit_count: + """c(1) received number of coefficients at limit.""" + resp.post1_tx_increment_req_count: + """c(1) transmitted number of increment requests.""" + resp.post1_tx_decrement_req_count: + """c(1) transmitted number of decrement requests.""" + resp.post1_tx_coeff_eq_limit_reached_count: + """c(1) transmitted number of maximum limits of coefficient and equalization requests reached.""" + resp.post1_tx_eq_limit_reached_count: + """c(1) transmitted number of maximum limits of equalization requests reached.""" + resp.post1_tx_coeff_not_supported_count: + """c(1) transmitted number of coefficients not supported.""" + resp.post1_tx_coeff_at_limit_count: + """c(1) transmitted number of coefficients at limit.""" + resp.pre2_current_level: + """c(-2) current level.""" + resp.pre2_rx_increment_req_count: + """c(-2) received number of increment requests.""" + resp.pre2_rx_decrement_req_count: + """c(-2) received number of decrement requests.""" + resp.pre2_rx_coeff_eq_limit_reached_count: + """c(-2) received number of maximum limits of coefficient and equalization requests reached.""" + resp.pre2_rx_eq_limit_reached_count: + """c(-2) received number of maximum limits of equalization requests reached.""" + resp.pre2_rx_coeff_not_supported_count: + """c(-2) received number of coefficients not supported.""" + resp.pre2_rx_coeff_at_limit_count: + """c(-2) received number of coefficients at limit.""" + resp.pre2_tx_increment_req_count: + """c(-2) transmitted number of increment requests.""" + resp.pre2_tx_decrement_req_count: + """c(-2) transmitted number of decrement requests.""" + resp.pre2_tx_coeff_eq_limit_reached_count: + """c(-2) transmitted number of maximum limits of coefficient and equalization requests reached.""" + resp.pre2_tx_eq_limit_reached_count: + """c(-2) transmitted number of maximum limits of equalization requests reached.""" + resp.pre2_tx_coeff_not_supported_count: + """c(-2) transmitted number of coefficients not supported.""" + resp.pre2_tx_coeff_at_limit_count: + """c(-2) transmitted number of coefficients at limit.""" + resp.pre3_current_level: + """c(-3) current level.""" + resp.pre3_rx_increment_req_count: + """c(-3) received number of increment requests.""" + resp.pre3_rx_decrement_req_count: + """c(-3) received number of decrement requests.""" + resp.pre3_rx_coeff_eq_limit_reached_count: + """c(-3) received number of maximum limits of coefficient and equalization requests reached.""" + resp.pre3_rx_eq_limit_reached_count: + """c(-3) received number of maximum limits of equalization requests reached.""" + resp.pre3_rx_coeff_not_supported_count: + """c(-3) received number of coefficients not supported.""" + resp.pre3_rx_coeff_at_limit_count: + """c(-3) received number of coefficients at limit.""" + resp.pre3_tx_increment_req_count: + """c(-3) transmitted number of increment requests.""" + resp.pre3_tx_decrement_req_count: + """c(-3) transmitted number of decrement requests.""" + resp.pre3_tx_coeff_eq_limit_reached_count: + """c(-3) transmitted number of maximum limits of coefficient and equalization requests reached.""" + resp.pre3_tx_eq_limit_reached_count: + """c(-3) transmitted number of maximum limits of equalization requests reached.""" + resp.pre3_tx_coeff_not_supported_count: + """c(-3) transmitted number of coefficients not supported.""" + resp.pre3_tx_coeff_at_limit_count: + """c(-3) transmitted number of coefficients at limit.""" + resp.prbs_total_bits_high: + """PRBS total bits (most significant 32-bit).""" + resp.prbs_total_bits_low: + """PRBS total bits (least significant 32-bit).""" + resp.prbs_total_error_bits_high: + """PRBS total error bits (most significant 32-bit, only bit 15-0 should be used).""" + resp.prbs_total_error_bits_low: + """PRBS total error bits (least significant 32-bit).""" + resp.frame_lock + """frame lock status of the local end.""" + resp.emote_frame_lock + """frame lock status of the remote end.""" + resp.num_frame_errors + resp.num_overruns + resp.last_ic_received + resp.last_ic_sent + diff --git a/docs/source/api_ref/hlapiv1/port/freya/index.rst b/docs/source/api_ref/hlapiv1/port/freya/index.rst new file mode 100644 index 00000000..23b72bb5 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/index.rst @@ -0,0 +1,12 @@ +Freya L1 +=============== + +.. toctree:: + :glob: + + * + anlt/index + medium/index + pcs/index + pma/index + prbs/index \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/linkflap.rst b/docs/source/api_ref/hlapiv1/port/freya/linkflap.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/linkflap.rst rename to docs/source/api_ref/hlapiv1/port/freya/linkflap.rst diff --git a/docs/source/api_ref/hlapiv1/port/freya/medium/index.rst b/docs/source/api_ref/hlapiv1/port/freya/medium/index.rst new file mode 100644 index 00000000..d0c86e29 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/medium/index.rst @@ -0,0 +1,7 @@ +Medium +======= + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/medium/retune.rst b/docs/source/api_ref/hlapiv1/port/freya/medium/retune.rst new file mode 100644 index 00000000..d7df87ae --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/medium/retune.rst @@ -0,0 +1,14 @@ +Tap Retune +=========== + +Trigger a new retuning of the receive equalizer on the PHY for one of the 25G +serdes. Useful if e.g. a direct attached copper cable or loop transceiver does +not go into sync after insertion. Note that the retuning will cause disruption +of the traffic on all serdes. + +Corresponding CLI command: ``PP_PHYRETUNE`` + +.. code-block:: python + + # TX Tap Retune + await port.serdes[0].phy.retune.set(dummy=1) \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/medium/rxtap.rst b/docs/source/api_ref/hlapiv1/port/freya/medium/rxtap.rst new file mode 100644 index 00000000..65a0bbc2 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/medium/rxtap.rst @@ -0,0 +1,152 @@ +RX Tap +====== + +Config +------- + +Set to manual values + +.. code-block:: python + + await port.l1.serdes[0].medium.rx.config.ctle_high.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.ctle_low.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.agc.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.oc.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.cdr.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_1.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_2.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_3.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_4.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_5.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_6.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_7.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_8.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.dfe.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_1.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_2.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_3.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_4.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_5.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_6.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_7.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_8.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_9.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_10.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_11.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_12.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_13.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_14.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_15.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_16.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_17.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_18.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_19.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_20.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_2.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_22.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_23.set(mode=enums.RxEqExtCapMode.MANUAL, value=value) + +Set to auto + +.. code-block:: python + + await port.l1.serdes[0].medium.rx.config.ctle_high.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.ctle_low.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.agc.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.oc.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.cdr.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_1.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_2.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_3.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_4.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_5.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_6.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_7.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_8.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.dfe.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_1.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_2.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_3.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_4.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_5.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_6.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_7.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_8.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_9.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_10.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_11.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_12.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_13.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_14.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_15.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_16.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_17.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_18.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_19.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_20.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_2.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_22.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_23.set(mode=enums.RxEqExtCapMode.AUTO, value=value) + +Freeze the current value. ```` will be ignored. + +.. code-block:: python + + await port.l1.serdes[0].medium.rx.config.ctle_high.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.ctle_low.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.agc.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.oc.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.cdr.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_1.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_2.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_3.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_4.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_5.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_6.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_7.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.pre_ffe_8.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.dfe.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_1.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_2.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_3.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_4.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_5.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_6.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_7.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_8.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_9.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_10.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_11.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_12.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_13.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_14.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_15.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_16.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_17.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_18.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_19.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_20.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_2.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_22.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + await port.l1.serdes[0].medium.rx.config.post_ffe_23.set(mode=enums.RxEqExtCapMode.FREEZE, value=value) + +Status +------- + +.. code-block:: python + + await port.l1.serdes[0].medium.rx.status.ctle_high.get() + await port.l1.serdes[0].medium.rx.status.ctle_low.get() + await port.l1.serdes[0].medium.rx.status.agc.get() + await port.l1.serdes[0].medium.rx.status.oc.get() + await port.l1.serdes[0].medium.rx.status.cdr.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_1.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_2.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_3.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_4.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_5.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_6.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_7.get() + await port.l1.serdes[0].medium.rx.status.pre_ffe_8.get() + await port.l1.serdes[0].medium.rx.status.dfe.get() + await port.l1.serdes[0].medium.rx.status.post_ffe_1.get() \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/medium/siv.rst b/docs/source/api_ref/hlapiv1/port/freya/medium/siv.rst new file mode 100644 index 00000000..f1c108c2 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/medium/siv.rst @@ -0,0 +1,51 @@ +Signal Integrity +================= + +The Signal Integrity feature offers the equivalent of an Equivalent Time oscilloscope trace of the RX PAM4 signal (later, also PAM2). The trace is done with the A/D converter in the GTM receiver also doing the data sampling / CDR function, i.e. the trace is taken after the RX equalizer. + +The HW characteristics of the Versal GTM used in Freya are: Trace length = 2000 samples, sample resolution = 7 bits 2's complement, i.e. range = -64..63. + +Using the sampled eye scan feature through CLI involves two steps: + +Trigger the acquisition of a trace (PL1_CTRL) + +Retrieve the trace data (PL1_GET_DATA) + +This command is a generic function to retrieve dynamic data related to Layer 1 / SERDES. For now, only used for signal integrity scan. + +For ``func==0``, sampled eye scan: + +* ``result==0``: No data available. + +"No data available" means that either a scan was never started, an acquisition was started and in progress, or the acquired data has become too old (e.g. older than 500 ms). The acquisition time for a trace is in the very low ms-range. If ``result==0``, ``sweep_no`` and ``age_us`` are dummy (=0), and no additional data are returned. + +* ``result==1``: Data returned. In that case, the rest of the parameters apply: + +``sweep_no``: per-SERDES trace acquisition counter: 1,2,3… Each trace can be returned multiple times, to different users, within its lifetime. A new trace acquisition is triggered with the PL1_CTRL command. + +``age_us``: The “age” of the trace data in microseconds, i.e. the time from data acquisition from hardware was completed until the time the command reply data is generated. + +``value``: The rest of the reply is a set of 16 bit signed 2-complement sample values. With present hardware, the range of each sample is -64..63. In XMP scripting, each sample value is represented as two bytes, msb first. + +With present implementation, 2006 sample values (4012 bytes) are returned. + +The first 6 sample values are so-called sampled levels: < p3> + +Control +------- + +.. code-block:: python + + await port.l1.serdes[0].medium.siv.control.set(opcode=enums.Layer1Opcode.START_SCAN) + + +Data +------ + +.. code-block:: python + + resp = await port.l1.serdes[0].medium.siv.data.get() + resp.result + resp.age_us + resp.sweep_no + resp.value \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/medium/txtap.rst b/docs/source/api_ref/hlapiv1/port/freya/medium/txtap.rst new file mode 100644 index 00000000..b7ac32f7 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/medium/txtap.rst @@ -0,0 +1,71 @@ +TX Tap +========================= + +mV/dB +------ +Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage). + +* pre3 tap value in dB/10, ranges from 0 to 71. Default = 0 (neutral) +* pre2 tap value in dB/10, ranges from 0 to 71. Default = 0 (neutral) +* pre tap value in dB/10, ranges from 0 to 187. Default = 0 (neutral) +* main tap value in mV, ranges from 507 to 998. +* post tap value in dB/10, ranges from 0 to 187 Default = 0 (neutral) + +Corresponding CLI command: ``PL1_PHYTXEQ_LEVEL`` + +.. code-block:: python + + await port.l1.serdes[0].medium.tx.level.set(pre3=, pre2=, pre=, main=, post=) + + resp = await port.l1.serdes[0].medium.tx.level.get() + resp.pre3 + resp.pre2 + resp.pre + resp.main + resp.post + +IEEE +------ +Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage). + +* pre3 tap value, negative, scaled by 1E3. Default = 0 (neutral) +* pre2 tap value, positive, scaled by 1E3. Default = 0 (neutral) +* pre tap value, negative, scaled by 1E3. Default = 0 (neutral) +* main tap value, positive, scaled by 1E3. Default = 1000 +* post tap value, negative, scaled by 1E3. Default = 0 (neutral) + +Corresponding CLI command: ``PL1_PHYTXEQ_COEFF`` + +.. code-block:: python + + await port.l1.serdes[0].medium.tx.ieee.set(pre3=, pre2=, pre=, main=, post=) + + resp = await port.l1.serdes[0].medium.tx.ieee.get() + resp.pre3 + resp.pre2 + resp.pre + resp.main + resp.post + +Nativ +------ +Control and monitor the equalizer settings of the on-board PHY in the transmission direction (towards the transceiver cage). + +* pre3 tap value. Default = 0 (neutral) +* pre2 tap value. Default = 0 (neutral) +* pre tap value. Default = 0 (neutral) +* main tap value. +* post tap value. Default = 0 (neutral) + +Corresponding CLI command: ``PL1_PHYTXEQ`` + +.. code-block:: python + + await port.l1.serdes[0].medium.tx.native.set(pre3=, pre2=, pre=, main=, post=) + + resp = await port.l1.serdes[0].medium.tx.native.get() + resp.pre3 + resp.pre2 + resp.pre + resp.main + resp.post \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/pcs_pma/fec.rst b/docs/source/api_ref/hlapiv1/port/freya/pcs/fec.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/pcs_pma/fec.rst rename to docs/source/api_ref/hlapiv1/port/freya/pcs/fec.rst diff --git a/docs/source/api_ref/hlapiv1/port/phy/index.rst b/docs/source/api_ref/hlapiv1/port/freya/pcs/index.rst similarity index 58% rename from docs/source/api_ref/hlapiv1/port/phy/index.rst rename to docs/source/api_ref/hlapiv1/port/freya/pcs/index.rst index b2166e8a..cb543223 100644 --- a/docs/source/api_ref/hlapiv1/port/phy/index.rst +++ b/docs/source/api_ref/hlapiv1/port/freya/pcs/index.rst @@ -1,8 +1,6 @@ -PHY +PCS ========================= -PHY settings for high-speed ports. - .. toctree:: :glob: diff --git a/docs/source/api_ref/hlapiv1/port/freya/pcs/pcs_variant.rst b/docs/source/api_ref/hlapiv1/port/freya/pcs/pcs_variant.rst new file mode 100644 index 00000000..548db0b8 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/pcs/pcs_variant.rst @@ -0,0 +1,10 @@ +PCS Variant +========================= + +.. code-block:: python + + resp = await port.l1.pcs_variant.get() + resp.variant + + await port.l1.pcs_variant.set(variant=enums.FreyaPCSVariant.ETC) + await port.l1.pcs_variant.set(variant=enums.FreyaPCSVariant.IEEE) \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/pcs_pma/rx_status.rst b/docs/source/api_ref/hlapiv1/port/freya/pcs/rx_status.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/pcs_pma/rx_status.rst rename to docs/source/api_ref/hlapiv1/port/freya/pcs/rx_status.rst diff --git a/docs/source/api_ref/hlapiv1/port/pcs_pma/tx_config.rst b/docs/source/api_ref/hlapiv1/port/freya/pcs/tx_config.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/pcs_pma/tx_config.rst rename to docs/source/api_ref/hlapiv1/port/freya/pcs/tx_config.rst diff --git a/docs/source/api_ref/hlapiv1/port/freya/pma/graycoding.rst b/docs/source/api_ref/hlapiv1/port/freya/pma/graycoding.rst new file mode 100644 index 00000000..b65d0bd2 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/pma/graycoding.rst @@ -0,0 +1,14 @@ +Gray Coding +========================= + +Corresponding CLI command: ``PP_GRAYCODING`` + +.. code-block:: python + + await port.l1.serdes[0].pma.graycoding.set(rx_mode=enums.GrayCodingMode.ON, rx_endianness=enums.Endianness.NORMAL, tx_mode=enums.GrayCodingMode.ON, tx_endianness=enums.Endianness.NORMAL) + + resp = await port.l1.serdes[0].pma.graycoding.get() + resp.rx_mode + resp.rx_endianness + resp.tx_mode + resp.tx_endianness diff --git a/docs/source/api_ref/hlapiv1/port/freya/pma/index.rst b/docs/source/api_ref/hlapiv1/port/freya/pma/index.rst new file mode 100644 index 00000000..eb8af9f2 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/pma/index.rst @@ -0,0 +1,7 @@ +PMA +===== + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/freya/pma/precoding.rst b/docs/source/api_ref/hlapiv1/port/freya/pma/precoding.rst new file mode 100644 index 00000000..b8c7ef42 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/pma/precoding.rst @@ -0,0 +1,14 @@ +Precoding +========================= + +Corresponding CLI command: ``PP_PRECODING`` + +.. code-block:: python + + await port.l1.serdes[0].pma.precoding.set(rx_mode=enums.PreCodingMode.ON, rx_endianness=enums.Endianness.NORMAL,tx_mode=enums.PreCodingMode.ON, tx_endianness=enums.Endianness.NORMAL) + + resp = await port.l1.serdes[0].pma.precoding.get() + resp.rx_mode + resp.rx_endianness + resp.tx_mode + resp.tx_endianness \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/pcs_pma/pulse_error_inject.rst b/docs/source/api_ref/hlapiv1/port/freya/pma/pulse_error_inject.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/pcs_pma/pulse_error_inject.rst rename to docs/source/api_ref/hlapiv1/port/freya/pma/pulse_error_inject.rst diff --git a/docs/source/api_ref/hlapiv1/port/freya/prbs/config.rst b/docs/source/api_ref/hlapiv1/port/freya/prbs/config.rst new file mode 100644 index 00000000..cd70eb67 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/prbs/config.rst @@ -0,0 +1,73 @@ +Configuration +========================= + +Type +------------------------- +Defines the PRBS type used when the interface is in PRBS mode. + +Corresponding CLI command: ``PP_PRBSTYPE`` + +.. code-block:: python + + # PRBS Configuration + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS7, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.CAUI_VIRTUAL, + polynomial=enums.PRBSPolynomial.PRBS9, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.PERSECOND) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS10, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS11, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS13, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS15, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS20, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS23, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS31, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS49, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + await port.l1.serdes[0].prbs.config.type.set( + prbs_inserted_type=enums.PRBSInsertedType.PHY_LINE, + polynomial=enums.PRBSPolynomial.PRBS58, + invert=enums.PRBSInvertState.NON_INVERTED, + statistics_mode=enums.PRBSStatisticsMode.ACCUMULATIVE) + + resp = await port.l1.serdes[0].prbs.config.type.get() + resp.prbs_inserted_type + resp.polynomial + resp.invert + resp.statistics_mode diff --git a/docs/source/api_ref/hlapiv1/port/prbs/index.rst b/docs/source/api_ref/hlapiv1/port/freya/prbs/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/prbs/index.rst rename to docs/source/api_ref/hlapiv1/port/freya/prbs/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/freya/prbs/stats.rst b/docs/source/api_ref/hlapiv1/port/freya/prbs/stats.rst new file mode 100644 index 00000000..730d682b --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/freya/prbs/stats.rst @@ -0,0 +1,14 @@ +Statistics +========================= +Statistics about PRBS pattern detection on the data received on a specified +SerDes. + +Corresponding CLI command: ``PP_RXPRBSSTATUS`` + +.. code-block:: python + + # PRBS Statistics + resp = await port.l1.serdes[0].prbs.status.get() + resp.byte_count + resp.error_count + resp.lock \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/tcvr.rst b/docs/source/api_ref/hlapiv1/port/freya/tcvr.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/tcvr.rst rename to docs/source/api_ref/hlapiv1/port/freya/tcvr.rst diff --git a/docs/source/api_ref/hlapiv1/port/action.rst b/docs/source/api_ref/hlapiv1/port/general/action.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/action.rst rename to docs/source/api_ref/hlapiv1/port/general/action.rst diff --git a/docs/source/api_ref/hlapiv1/port/capabilities.rst b/docs/source/api_ref/hlapiv1/port/general/capabilities.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/capabilities.rst rename to docs/source/api_ref/hlapiv1/port/general/capabilities.rst diff --git a/docs/source/api_ref/hlapiv1/port/control.rst b/docs/source/api_ref/hlapiv1/port/general/control.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/control.rst rename to docs/source/api_ref/hlapiv1/port/general/control.rst diff --git a/docs/source/api_ref/hlapiv1/port/identification.rst b/docs/source/api_ref/hlapiv1/port/general/identification.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/identification.rst rename to docs/source/api_ref/hlapiv1/port/general/identification.rst diff --git a/docs/source/api_ref/hlapiv1/port/general/index.rst b/docs/source/api_ref/hlapiv1/port/general/index.rst new file mode 100644 index 00000000..c73af376 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/general/index.rst @@ -0,0 +1,7 @@ +General +======== + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/reservation.rst b/docs/source/api_ref/hlapiv1/port/general/reservation.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/reservation.rst rename to docs/source/api_ref/hlapiv1/port/general/reservation.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/config.rst b/docs/source/api_ref/hlapiv1/port/impairment/config.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/config.rst rename to docs/source/api_ref/hlapiv1/port/impairment/config.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/corruption/configuration.rst b/docs/source/api_ref/hlapiv1/port/impairment/corruption/configuration.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/corruption/configuration.rst rename to docs/source/api_ref/hlapiv1/port/impairment/corruption/configuration.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/corruption/distribution.rst b/docs/source/api_ref/hlapiv1/port/impairment/corruption/distribution.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/corruption/distribution.rst rename to docs/source/api_ref/hlapiv1/port/impairment/corruption/distribution.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/corruption/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/corruption/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/corruption/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/corruption/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/corruption/scheduling.rst b/docs/source/api_ref/hlapiv1/port/impairment/corruption/scheduling.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/corruption/scheduling.rst rename to docs/source/api_ref/hlapiv1/port/impairment/corruption/scheduling.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/drop/distribution.rst b/docs/source/api_ref/hlapiv1/port/impairment/drop/distribution.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/drop/distribution.rst rename to docs/source/api_ref/hlapiv1/port/impairment/drop/distribution.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/drop/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/drop/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/drop/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/drop/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/drop/scheduling.rst b/docs/source/api_ref/hlapiv1/port/impairment/drop/scheduling.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/drop/scheduling.rst rename to docs/source/api_ref/hlapiv1/port/impairment/drop/scheduling.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/duplication/distribution.rst b/docs/source/api_ref/hlapiv1/port/impairment/duplication/distribution.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/duplication/distribution.rst rename to docs/source/api_ref/hlapiv1/port/impairment/duplication/distribution.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/duplication/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/duplication/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/duplication/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/duplication/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/duplication/scheduling.rst b/docs/source/api_ref/hlapiv1/port/impairment/duplication/scheduling.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/duplication/scheduling.rst rename to docs/source/api_ref/hlapiv1/port/impairment/duplication/scheduling.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/basic/any.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/basic/any.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/basic/any.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/basic/any.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/basic/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/basic/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/basic/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/basic/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l2.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l2.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l2.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l2.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l2plus.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l2plus.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l2plus.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l2plus.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l3.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l3.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l3.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l3.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l4.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l4.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/basic/l4.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/basic/l4.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/basic/tpld.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/basic/tpld.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/basic/tpld.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/basic/tpld.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/extended.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/extended.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/extended.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/extended.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/filter/properties.rst b/docs/source/api_ref/hlapiv1/port/impairment/filter/properties.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/filter/properties.rst rename to docs/source/api_ref/hlapiv1/port/impairment/filter/properties.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/configuration.rst b/docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/configuration.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/configuration.rst rename to docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/configuration.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/distribution.rst b/docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/distribution.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/distribution.rst rename to docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/distribution.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/scheduling.rst b/docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/scheduling.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/latencyjitter/scheduling.rst rename to docs/source/api_ref/hlapiv1/port/impairment/latencyjitter/scheduling.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/misorder/configuration.rst b/docs/source/api_ref/hlapiv1/port/impairment/misorder/configuration.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/misorder/configuration.rst rename to docs/source/api_ref/hlapiv1/port/impairment/misorder/configuration.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/misorder/distribution.rst b/docs/source/api_ref/hlapiv1/port/impairment/misorder/distribution.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/misorder/distribution.rst rename to docs/source/api_ref/hlapiv1/port/impairment/misorder/distribution.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/misorder/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/misorder/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/misorder/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/misorder/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/misorder/scheduling.rst b/docs/source/api_ref/hlapiv1/port/impairment/misorder/scheduling.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/misorder/scheduling.rst rename to docs/source/api_ref/hlapiv1/port/impairment/misorder/scheduling.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/policer/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/policer/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/policer/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/policer/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/shaper/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/shaper/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/shaper/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/shaper/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/chimera/statistics/index.rst b/docs/source/api_ref/hlapiv1/port/impairment/statistics/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/chimera/statistics/index.rst rename to docs/source/api_ref/hlapiv1/port/impairment/statistics/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/index.rst b/docs/source/api_ref/hlapiv1/port/index.rst index 35ebb0f1..37ab35ff 100644 --- a/docs/source/api_ref/hlapiv1/port/index.rst +++ b/docs/source/api_ref/hlapiv1/port/index.rst @@ -7,13 +7,9 @@ Package ``xoa_driver.ports`` includes port APIs for Valkyrie, Vulcan, Chimera, V :glob: * - histogram/index - filter/index - matchterm/index - lengthterm/index - pcs_pma/index - phy/index - prbs/index - statistics/index - chimera/index + general/index + tg/index + layer1/index + freya/index + impairment/index vulcan/index \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/pcs_pma/aneg.rst b/docs/source/api_ref/hlapiv1/port/layer1/anlt/aneg.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/pcs_pma/aneg.rst rename to docs/source/api_ref/hlapiv1/port/layer1/anlt/aneg.rst diff --git a/docs/source/api_ref/hlapiv1/port/layer1/anlt/index.rst b/docs/source/api_ref/hlapiv1/port/layer1/anlt/index.rst new file mode 100644 index 00000000..82a4bd05 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/anlt/index.rst @@ -0,0 +1,7 @@ +ANLT +===== + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/pcs_pma/linktrain.rst b/docs/source/api_ref/hlapiv1/port/layer1/anlt/linktrain.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/pcs_pma/linktrain.rst rename to docs/source/api_ref/hlapiv1/port/layer1/anlt/linktrain.rst diff --git a/docs/source/api_ref/hlapiv1/port/eee.rst b/docs/source/api_ref/hlapiv1/port/layer1/eee.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/eee.rst rename to docs/source/api_ref/hlapiv1/port/layer1/eee.rst diff --git a/docs/source/api_ref/hlapiv1/port/fault.rst b/docs/source/api_ref/hlapiv1/port/layer1/fault.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/fault.rst rename to docs/source/api_ref/hlapiv1/port/layer1/fault.rst diff --git a/docs/source/api_ref/hlapiv1/port/layer1/index.rst b/docs/source/api_ref/hlapiv1/port/layer1/index.rst new file mode 100644 index 00000000..ecb5f9e5 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/index.rst @@ -0,0 +1,12 @@ +Layer 1 (Thor, Loki, Odin) +========================== + +.. toctree:: + :glob: + + * + anlt/index + medium/index + pcs/index + pma/index + prbs/index \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/layer1/linkflap.rst b/docs/source/api_ref/hlapiv1/port/layer1/linkflap.rst new file mode 100644 index 00000000..d2f3b860 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/linkflap.rst @@ -0,0 +1,36 @@ +Link Flap +========================= + +Control +------------- +Enable / disable port 'link flap'. + +Corresponding CLI command: ``PP_LINKFLAP_ENABLE`` + +.. code-block:: python + + # Link Flap - Control + await port.pcs_pma.link_flap.enable.set(on_off=enums.OnOff.ON) + await port.pcs_pma.link_flap.enable.set_on() + await port.pcs_pma.link_flap.enable.set(on_off=enums.OnOff.OFF) + await port.pcs_pma.link_flap.enable.set_off() + + resp = await port.pcs_pma.link_flap.enable.get() + resp.on_off + + +Configuration +------------- +Set port 'link flap' parameters. Notice: Period must be larger than duration. + +Corresponding CLI command: ``PP_LINKFLAP_PARAMS`` + +.. code-block:: python + + # Link Flap - Configuration + await port.pcs_pma.link_flap.params.set(duration=10, period=20, repetition=0) + + resp = await port.pcs_pma.link_flap.params.get() + resp.duration + resp.period + resp.repetition \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/phy/eyediagram.rst b/docs/source/api_ref/hlapiv1/port/layer1/medium/eyediagram.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/phy/eyediagram.rst rename to docs/source/api_ref/hlapiv1/port/layer1/medium/eyediagram.rst diff --git a/docs/source/api_ref/hlapiv1/port/layer1/medium/index.rst b/docs/source/api_ref/hlapiv1/port/layer1/medium/index.rst new file mode 100644 index 00000000..d0c86e29 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/medium/index.rst @@ -0,0 +1,7 @@ +Medium +======= + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/phy/settings.rst b/docs/source/api_ref/hlapiv1/port/layer1/medium/settings.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/phy/settings.rst rename to docs/source/api_ref/hlapiv1/port/layer1/medium/settings.rst diff --git a/docs/source/api_ref/hlapiv1/port/phy/tap.rst b/docs/source/api_ref/hlapiv1/port/layer1/medium/tap.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/phy/tap.rst rename to docs/source/api_ref/hlapiv1/port/layer1/medium/tap.rst diff --git a/docs/source/api_ref/hlapiv1/port/layer1/pcs/fec.rst b/docs/source/api_ref/hlapiv1/port/layer1/pcs/fec.rst new file mode 100644 index 00000000..01f3751a --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/pcs/fec.rst @@ -0,0 +1,21 @@ +Forward Error Correction +========================= + +FEC Mode +-------- +FEC mode for port that supports FEC. + +Corresponding CLI command: ``PP_FECMODE`` + +.. code-block:: python + + # FEC Mode + await port.fec_mode.set(mode=enums.FECMode.RS_FEC) + await port.fec_mode.set(mode=enums.FECMode.RS_FEC_KP) + await port.fec_mode.set(mode=enums.FECMode.RS_FEC_KR) + await port.fec_mode.set(mode=enums.FECMode.FC_FEC) + await port.fec_mode.set(mode=enums.FECMode.OFF) + await port.fec_mode.set(mode=enums.FECMode.ON) + + resp = await port.fec_mode.get() + resp.mode diff --git a/docs/source/api_ref/hlapiv1/port/layer1/pcs/index.rst b/docs/source/api_ref/hlapiv1/port/layer1/pcs/index.rst new file mode 100644 index 00000000..cb543223 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/pcs/index.rst @@ -0,0 +1,7 @@ +PCS +========================= + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/layer1/pcs/rx_status.rst b/docs/source/api_ref/hlapiv1/port/layer1/pcs/rx_status.rst new file mode 100644 index 00000000..cdd8d695 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/pcs/rx_status.rst @@ -0,0 +1,94 @@ +RX Status +========================= + +Lane Error Counters +------------------- +Statistics about errors detected at the physical coding sub-layer on the data +received on a specified physical lane. + +Corresponding CLI command: ``PP_RXLANEERRORS`` + +.. code-block:: python + + # RX Status - Lane Error Counters + resp = await port.pcs_pma.lanes[0].rx_status.errors.get() + resp.alignment_error_count + resp.corrected_fec_error_count + resp.header_error_count + + +Lock Status +---------------- +Whether the receiver has achieved header lock and alignment lock on the data +received on a specified physical lane. + +Corresponding CLI command: ``PP_RXLANELOCK`` + +.. code-block:: python + + # RX Status - Lock Status + resp = await port.pcs_pma.lanes[0].rx_status.lock.get() + resp.align_lock + resp.header_lock + + +Lane Status +---------------- +The virtual lane index and actual skew for data received on a specified physical +lane. This is only meaningful when the lane is in header lock and alignment +lock. + +Corresponding CLI command: ``PP_RXLANESTATUS`` + +.. code-block:: python + + # RX Status - Lane Status + resp = await port.pcs_pma.lanes[0].rx_status.status.get() + resp.skew + resp.virtual_lane + + +Clear Counters +--------------- +Clear all the PCS/PMA receiver statistics for a port. + +Corresponding CLI command: ``PP_RXCLEAR`` + +.. code-block:: python + + # RX Status - Clear Counters + await port.pcs_pma.rx.clear.set() + + +RX FEC Stats +--------------- +Provides statistics on how many FEC blocks have been seen with a given number of symbol errors. + +Corresponding CLI command: ``PP_RXFECSTATS`` + +.. code-block:: python + + # RX Status - RX FEC Stats + resp = await port.pcs_pma.rx.fec_status.get() + resp.stats_type + resp.data_count # number of values in stats + resp.stats # list of long integers, array of length value_count. The stats array shows how many FEC blocks have been seen with [0, 1, 2, 3....15, >15] symbol errors and the last one is the sum of FEC blocks with <=n symbol errors + + +RX Total Stats +--------------- +Provides FEC Total counters. + +Corresponding CLI command: ``PP_RXTOTALSTATS`` + +.. code-block:: python + + # RX Status - RX Total Stats + resp = await port.pcs_pma.rx.total_status.get() + resp.total_corrected_codeword_count + resp.total_corrected_symbol_count + resp.total_rx_bit_count + resp.total_rx_codeword_count + resp.total_uncorrectable_codeword_count + post_fec_ber = 1/resp.total_post_fec_ber + pre_fec_ber = 1/resp.total_pre_fec_ber \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/layer1/pcs/tx_config.rst b/docs/source/api_ref/hlapiv1/port/layer1/pcs/tx_config.rst new file mode 100644 index 00000000..14b1d572 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/pcs/tx_config.rst @@ -0,0 +1,80 @@ +TX Configuration +========================= + +Error Counters +--------------------- +Obtain the error count of each alarm, PCS Error, FEC Error, Header Error, Align +Error, BIP Error, and High BER Error. + +Corresponding CLI command: ``PP_ALARMS_ERRORS`` + +.. code-block:: python + + # TX Configuration - Error Counters + resp = await port.pcs_pma.alarms.errors.get() + resp.total_alarms + resp.los_error_count + resp.total_align_error_count + resp.total_bip_error_count + resp.total_fec_error_count + resp.total_header_error_count + resp.total_higher_error_count + resp.total_pcs_error_count + resp.valid_mask + + +Error Generation Rate +--------------------- +The rate of continuous bit-level error injection. Errors are injected evenly +across the SerDes where injection is enabled. + +Corresponding CLI command: ``PP_TXERRORRATE`` + +.. code-block:: python + + # TX Configuration - Error Generation Rate + resp = await port.pcs_pma.error_gen.error_rate.get() + resp.rate + + +Error Generation Inject +----------------------- +Inject a single bit-level error into the SerDes where injection has been enabled. + +Corresponding CLI command: ``PP_TXINJECTONE`` + +.. code-block:: python + + # TX Configuration - Error Generation Inject + await port.pcs_pma.error_gen.inject_one.set() + + +Error Injection +--------------------- +Inject a particular kind of CAUI error into a specific physical lane. + +Corresponding CLI command: ``PP_TXLANEINJECT`` + +.. code-block:: python + + # TX Configuration - Error Injection + await port.pcs_pma.lanes[0].tx_error_inject.set_alignerror() + await port.pcs_pma.lanes[0].tx_error_inject.set_bip8error() + await port.pcs_pma.lanes[0].tx_error_inject.set_headererror() + + +Lane Configuration +--------------------- +The virtual lane index and artificial skew for data transmitted on a specified +physical lane. + +Corresponding CLI command: ``PP_TXLANECONFIG`` + +.. code-block:: python + + # TX Configuration - Lane Configuration + await port.pcs_pma.lanes[0].tx_config.set(virt_lane_index=1, skew=10) + + resp = await port.pcs_pma.lanes[0].tx_config.get() + resp.virt_lane_index + resp.skew diff --git a/docs/source/api_ref/hlapiv1/port/layer1/pma/index.rst b/docs/source/api_ref/hlapiv1/port/layer1/pma/index.rst new file mode 100644 index 00000000..eb8af9f2 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/pma/index.rst @@ -0,0 +1,7 @@ +PMA +===== + +.. toctree:: + :glob: + + * \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/layer1/pma/pulse_error_inject.rst b/docs/source/api_ref/hlapiv1/port/layer1/pma/pulse_error_inject.rst new file mode 100644 index 00000000..de068415 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/pma/pulse_error_inject.rst @@ -0,0 +1,41 @@ +PMA Pulse Error Inject +========================= + +Control +-------- +Enable / disable 'PMA pulse error inject'. + +Corresponding CLI command: ``PP_PMAERRPUL_ENABLE`` + +.. code-block:: python + + # PMA Pulse Error Inject Control + await port.pcs_pma.pma_pulse_err_inj.enable.set(on_off=enums.OnOff.ON) + await port.pcs_pma.pma_pulse_err_inj.enable.set_on() + await port.pcs_pma.pma_pulse_err_inj.enable.set(on_off=enums.OnOff.OFF) + await port.pcs_pma.pma_pulse_err_inj.enable.set_off() + + resp = await port.pcs_pma.pma_pulse_err_inj.enable.get() + resp.on_off + + +Configuration +-------------- +The 'PMA pulse error inject'. + +.. note:: + + Period must be > duration. BER will be: coeff * 10exp + +Corresponding CLI command: ``PP_PMAERRPUL_PARAMS`` + +.. code-block:: python + + # PMA Pulse Error Inject Configuration + await port.pcs_pma.pma_pulse_err_inj.params.set(duration=1000, period=1000, repetition=10, coeff=5, exp=-5) + + resp = await port.pcs_pma.pma_pulse_err_inj.params.get() + resp.duration + resp.period + resp.coeff + resp.exp \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/prbs/config.rst b/docs/source/api_ref/hlapiv1/port/layer1/prbs/config.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/prbs/config.rst rename to docs/source/api_ref/hlapiv1/port/layer1/prbs/config.rst diff --git a/docs/source/api_ref/hlapiv1/port/pcs_pma/index.rst b/docs/source/api_ref/hlapiv1/port/layer1/prbs/index.rst similarity index 57% rename from docs/source/api_ref/hlapiv1/port/pcs_pma/index.rst rename to docs/source/api_ref/hlapiv1/port/layer1/prbs/index.rst index 7c18915c..dd915d8f 100644 --- a/docs/source/api_ref/hlapiv1/port/pcs_pma/index.rst +++ b/docs/source/api_ref/hlapiv1/port/layer1/prbs/index.rst @@ -1,7 +1,7 @@ -PCS/PMA +PRBS ========================= -PCS/PMA APIs for high-speed ports. +PRBS settings for high-speed ports. .. toctree:: :glob: diff --git a/docs/source/api_ref/hlapiv1/port/prbs/stats.rst b/docs/source/api_ref/hlapiv1/port/layer1/prbs/stats.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/prbs/stats.rst rename to docs/source/api_ref/hlapiv1/port/layer1/prbs/stats.rst diff --git a/docs/source/api_ref/hlapiv1/port/layer1/tcvr.rst b/docs/source/api_ref/hlapiv1/port/layer1/tcvr.rst new file mode 100644 index 00000000..d6acbf90 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/layer1/tcvr.rst @@ -0,0 +1,110 @@ +Transceiver +========================= + + +Status +------------------ +Get various tcvr status information. RX loss status of the individual RX optical lanes (only 4 lanes are supported currently). + +Corresponding CLI command: ``P_TCVRSTATUS`` + +.. code-block:: python + + # Transceiver Status + resp = await port.tcvr_status.get() + resp.rx_loss_lane_0 + resp.rx_loss_lane_1 + resp.rx_loss_lane_2 + resp.rx_loss_lane_3 + + +Read & Write +------------- +Provides read and write access to the register interface supported by the port transceiver. It is possible to both read and write register values. + +Corresponding CLI command: ``PX_RW`` + +.. code-block:: python + + # Transceiver Read & Write + await port.transceiver.access_rw(page_address=0, register_address=0).set(value=Hex("FF")) + + resp = await port.transceiver.access_rw(page_address=0, register_address=0).get() + resp.value + +Sequential Read & Write +----------------------- +I2C sequential access to a transceiver's register. +When invoked, the ```` number of bytes will be read or written in one I2C transaction, in which the ```` is read or written with only a single register address setup. A subsequent invocation will perform a second I2C transaction in the same manner. + +``<_page_xindex>``: the transceiver page address, integer, 0-255. +``<_register_xaddress>``: the address within the page, integer, 0-255. + +Corresponding CLI command: ``PX_RW_SEQ`` + +.. code-block:: python + + # Transceiver Sequential Read & Write + await port.transceiver.access_rw_seq(page_address=0, register_address=0, byte_count=4).set(value=Hex("00FF00FF")) + + resp = await port.transceiver.access_rw_seq(page_address=0, register_address=0, byte_count=4).get() + resp.value + + +MII +------------------ +Provides access to the register interface supported by the media-independent interface (MII) transceiver. It is possible to both read and write register values. + +Corresponding CLI command: ``PX_MII`` + +.. code-block:: python + + # Transceiver MII + await port.transceiver.access_mii(register_address=0).set(value=Hex("00")) + + resp = await port.transceiver.access_mii(register_address=0).get() + resp.value + + +Temperature +------------------ +Transceiver temperature in degrees Celsius. + +Corresponding CLI command: ``PX_TEMPERATURE`` + +.. code-block:: python + + # Transceiver Temperature + resp = await port.transceiver.access_temperature().get() + resp.integral_part + resp.fractional_part + + +RX Laser Power +-------------- +Reading of the optical power level of the received signal. There is one value +for each laser/wavelength, and the number of these depends on the kind of CFP +transceiver used. The list is empty if the CFP transceiver does not support +optical power read-out. + +Corresponding CLI command: ``PP_RXLASERPOWER`` + +.. code-block:: python + + # Transceiver RX Laser Power + resp = await port.pcs_pma.transceiver.rx_laser_power.get() + resp.nanowatts + + +TX Laser Power +-------------- +Reading of the optical power level of the transmission signal. There is one +value for each laser/wavelength, and the number of these depends on the kind of CFP transceiver used. The list is empty if the CFP transceiver does not support optical power read-out. + +Corresponding CLI command: ``PP_TXLASERPOWER`` + +.. code-block:: python + + # Transceiver TX Laser Power + resp = await port.pcs_pma.transceiver.tx_laser_power.get() + resp.nanowatts diff --git a/docs/source/api_ref/hlapiv1/port/address.rst b/docs/source/api_ref/hlapiv1/port/tg/address.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/address.rst rename to docs/source/api_ref/hlapiv1/port/tg/address.rst diff --git a/docs/source/api_ref/hlapiv1/port/capture.rst b/docs/source/api_ref/hlapiv1/port/tg/capture.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/capture.rst rename to docs/source/api_ref/hlapiv1/port/tg/capture.rst diff --git a/docs/source/api_ref/hlapiv1/port/filter/config.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/config.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/filter/config.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/config.rst diff --git a/docs/source/api_ref/hlapiv1/port/filter/create.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/create.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/filter/create.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/create.rst diff --git a/docs/source/api_ref/hlapiv1/port/filter/index.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/index.rst similarity index 65% rename from docs/source/api_ref/hlapiv1/port/filter/index.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/index.rst index 51eec829..d83ee4f5 100644 --- a/docs/source/api_ref/hlapiv1/port/filter/index.rst +++ b/docs/source/api_ref/hlapiv1/port/tg/filter/index.rst @@ -6,4 +6,6 @@ Filter APIs for Valkyrie. .. toctree:: :glob: - * \ No newline at end of file + * + lengthterm/index + matchterm/index \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/lengthterm/config.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/lengthterm/config.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/lengthterm/config.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/lengthterm/config.rst diff --git a/docs/source/api_ref/hlapiv1/port/lengthterm/create.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/lengthterm/create.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/lengthterm/create.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/lengthterm/create.rst diff --git a/docs/source/api_ref/hlapiv1/port/lengthterm/index.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/lengthterm/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/lengthterm/index.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/lengthterm/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/matchterm/config.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/matchterm/config.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/matchterm/config.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/matchterm/config.rst diff --git a/docs/source/api_ref/hlapiv1/port/matchterm/create.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/matchterm/create.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/matchterm/create.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/matchterm/create.rst diff --git a/docs/source/api_ref/hlapiv1/port/matchterm/index.rst b/docs/source/api_ref/hlapiv1/port/tg/filter/matchterm/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/matchterm/index.rst rename to docs/source/api_ref/hlapiv1/port/tg/filter/matchterm/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/histogram/config.rst b/docs/source/api_ref/hlapiv1/port/tg/histogram/config.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/histogram/config.rst rename to docs/source/api_ref/hlapiv1/port/tg/histogram/config.rst diff --git a/docs/source/api_ref/hlapiv1/port/histogram/create.rst b/docs/source/api_ref/hlapiv1/port/tg/histogram/create.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/histogram/create.rst rename to docs/source/api_ref/hlapiv1/port/tg/histogram/create.rst diff --git a/docs/source/api_ref/hlapiv1/port/histogram/index.rst b/docs/source/api_ref/hlapiv1/port/tg/histogram/index.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/histogram/index.rst rename to docs/source/api_ref/hlapiv1/port/tg/histogram/index.rst diff --git a/docs/source/api_ref/hlapiv1/port/tg/index.rst b/docs/source/api_ref/hlapiv1/port/tg/index.rst new file mode 100644 index 00000000..d8387a27 --- /dev/null +++ b/docs/source/api_ref/hlapiv1/port/tg/index.rst @@ -0,0 +1,10 @@ +Traffic Generation +=================== + +.. toctree:: + :glob: + + * + filter/index + histogram/index + statistics/index \ No newline at end of file diff --git a/docs/source/api_ref/hlapiv1/port/latency.rst b/docs/source/api_ref/hlapiv1/port/tg/latency.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/latency.rst rename to docs/source/api_ref/hlapiv1/port/tg/latency.rst diff --git a/docs/source/api_ref/hlapiv1/port/multicast.rst b/docs/source/api_ref/hlapiv1/port/tg/multicast.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/multicast.rst rename to docs/source/api_ref/hlapiv1/port/tg/multicast.rst diff --git a/docs/source/api_ref/hlapiv1/port/payload.rst b/docs/source/api_ref/hlapiv1/port/tg/payload.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/payload.rst rename to docs/source/api_ref/hlapiv1/port/tg/payload.rst diff --git a/docs/source/api_ref/hlapiv1/port/preamble.rst b/docs/source/api_ref/hlapiv1/port/tg/preamble.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/preamble.rst rename to docs/source/api_ref/hlapiv1/port/tg/preamble.rst diff --git a/docs/source/api_ref/hlapiv1/port/runt.rst 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a/docs/source/api_ref/hlapiv1/port/statistics/rx.rst b/docs/source/api_ref/hlapiv1/port/tg/statistics/rx.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/statistics/rx.rst rename to docs/source/api_ref/hlapiv1/port/tg/statistics/rx.rst diff --git a/docs/source/api_ref/hlapiv1/port/statistics/tx.rst b/docs/source/api_ref/hlapiv1/port/tg/statistics/tx.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/statistics/tx.rst rename to docs/source/api_ref/hlapiv1/port/tg/statistics/tx.rst diff --git a/docs/source/api_ref/hlapiv1/port/status.rst b/docs/source/api_ref/hlapiv1/port/tg/status.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/status.rst rename to docs/source/api_ref/hlapiv1/port/tg/status.rst diff --git a/docs/source/api_ref/hlapiv1/port/traffic.rst b/docs/source/api_ref/hlapiv1/port/tg/traffic.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/traffic.rst rename to docs/source/api_ref/hlapiv1/port/tg/traffic.rst diff --git a/docs/source/api_ref/hlapiv1/port/tx_profile.rst b/docs/source/api_ref/hlapiv1/port/tg/tx_profile.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/tx_profile.rst rename to docs/source/api_ref/hlapiv1/port/tg/tx_profile.rst diff --git a/docs/source/api_ref/hlapiv1/port/uat.rst b/docs/source/api_ref/hlapiv1/port/tg/uat.rst similarity index 100% rename from docs/source/api_ref/hlapiv1/port/uat.rst rename to docs/source/api_ref/hlapiv1/port/tg/uat.rst diff --git a/xoa_driver/__init__.py b/xoa_driver/__init__.py index 1df213c2..38aa0922 100644 --- a/xoa_driver/__init__.py +++ b/xoa_driver/__init__.py @@ -1,2 +1,2 @@ -__version__ = "2.5.6" -__short_version__ = "2.5" +__version__ = "2.6.0" +__short_version__ = "2.6" diff --git a/xoa_driver/enums.py b/xoa_driver/enums.py index 77e36c01..231a14a7 100644 --- a/xoa_driver/enums.py +++ b/xoa_driver/enums.py @@ -183,6 +183,7 @@ Layer1Control, FreyaPCSVariant, FreyaTecAbilityHCD, + Layer1Opcode, ) __all__ = ( @@ -368,4 +369,5 @@ "Layer1Control", "FreyaPCSVariant", "FreyaTecAbilityHCD", + "Layer1Opcode", ) diff --git a/xoa_driver/internals/commands/pl1_commands.py b/xoa_driver/internals/commands/pl1_commands.py index e1c1cba5..1702e21a 100644 --- a/xoa_driver/internals/commands/pl1_commands.py +++ b/xoa_driver/internals/commands/pl1_commands.py @@ -1,7 +1,7 @@ from __future__ import annotations from dataclasses import dataclass import typing - +import functools from xoa_driver.internals.core.builders import ( build_get_request, build_set_request @@ -507,7 +507,7 @@ class PL1_GET_DATA: _serdes_xindex: int _func_xindex: Layer1Control - class SetDataAttr(RequestBodyStruct): + class GetDataAttr(ResponseBodyStruct): result: int = field(XmpInt()) """Data availability.""" @@ -520,9 +520,9 @@ class SetDataAttr(RequestBodyStruct): value: typing.List[int] = field(XmpSequence(types_chunk=[XmpByte()])) """a set of 16 bit signed 2-complement sample values. With present hardware, the range of each sample is -64..63. In CLI scripting, each sample value is represented as two bytes, msb first.""" - def set(self, opcode: Layer1Opcode) -> Token[None]: + def get(self) -> Token[GetDataAttr]: - return Token(self._connection, build_set_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex, self._func_xindex], opcode=opcode)) + return Token(self._connection, build_get_request(self, module=self._module, port=self._port, indices=[self._serdes_xindex, self._func_xindex])) @register_command @dataclass @@ -795,6 +795,30 @@ def get(self) -> Token[GetDataAttr]: def set(self, an_mode: FreyaAutonegMode, lt_mode: FreyaLinkTrainingMode) -> Token[None]: return Token(self._connection, build_set_request(self, module=self._module, port=self._port, an_mode=an_mode, lt_mode=lt_mode)) + + enable_an_only = functools.partialmethod(set, FreyaAutonegMode.ENABLED, FreyaLinkTrainingMode.DISABLED) + """Enable Autoneg only. + """ + + enable_lt_auto_only = functools.partialmethod(set, FreyaAutonegMode.DISABLED, FreyaLinkTrainingMode.ENABLED_AUTO) + """Enable Link Training (auto) only. + """ + + enable_lt_interactive_only = functools.partialmethod(set, FreyaAutonegMode.DISABLED, FreyaLinkTrainingMode.ENABLED_INTERACTIVE) + """Enable Link Training (interactive) only. + """ + + enable_an_lt_auto = functools.partialmethod(set, FreyaAutonegMode.ENABLED, FreyaLinkTrainingMode.ENABLED_AUTO) + """Enable Autoneg + Link Training (auto). + """ + + enable_an_lt_interactive = functools.partialmethod(set, FreyaAutonegMode.ENABLED, FreyaLinkTrainingMode.ENABLED_INTERACTIVE) + """Enable Autoneg + Link Training (interactive). + """ + + disable_anlt = functools.partialmethod(set, FreyaAutonegMode.DISABLED, FreyaLinkTrainingMode.DISABLED) + """Disable ANLT. + """ @register_command @dataclass diff --git a/xoa_driver/internals/hli_v1/modules/base_module.py b/xoa_driver/internals/hli_v1/modules/base_module.py index a9e8c456..40fa14fc 100644 --- a/xoa_driver/internals/hli_v1/modules/base_module.py +++ b/xoa_driver/internals/hli_v1/modules/base_module.py @@ -17,7 +17,8 @@ M_RESERVATION, M_RESERVEDBY, M_SERIALNO, - M_VERSIONNO + M_VERSIONNO, + M_MODEL_NAME, ) from xoa_driver.internals.utils import attributes as utils @@ -56,6 +57,12 @@ def __init__(self, conn: "itf.IConnection", init_data: "m_itf.ModuleInitData") - :type: M_MODEL """ + self.model_name = M_MODEL_NAME(self._conn, self.module_id) + """Test module's model name. + + :type: M_MODEL_NAME + """ + self.serial_number = M_SERIALNO(self._conn, self.module_id) """Test module's serial number. diff --git a/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py b/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py index 48a8091a..f3057b53 100644 --- a/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py +++ b/xoa_driver/internals/hli_v1/ports/port_l23/family_l1.py @@ -4,11 +4,8 @@ from typing_extensions import Self from xoa_driver.internals.commands import ( P_DYNAMIC, - # PL1_AUTONEGINFO, - # PL1_LINKTRAININFO, - # PL1_LOG, - # PL1_CFG_TMP, ) +from xoa_driver import enums from xoa_driver.internals.utils import attributes as utils if TYPE_CHECKING: from xoa_driver.internals.core import interfaces as itf @@ -20,16 +17,22 @@ SerDes, ) from .pcs_pma_l import PcsPma as PcsPma3 - +from .freya_l1 import Layer1 class PcsPma(PcsPma1, PcsPma2, PcsPma3): - """PCS/PMA layer for Family L1 + """Freya PCS/PMA """ def __init__(self, conn: "itf.IConnection", port) -> None: PcsPma1.__init__(self, conn, port) PcsPma2.__init__(self, conn, port) PcsPma3.__init__(self, conn, port) +class L1(Layer1): + """Freya L1 + """ + def __init__(self, conn: "itf.IConnection", port) -> None: + Layer1.__init__(self, conn, port) + class FamilyFreya(BasePortL23Genuine): pcs_pma: PcsPma @@ -61,6 +64,7 @@ async def _setup(self) -> Self: SerDes(self._conn, *self.kind, serdes_xindex=serdes_xindex) for serdes_xindex in range(self.info.capabilities.serdes_count) ) + self.l1 = L1(self._conn, self) return self on_dynamic_change = functools.partialmethod(utils.on_event, P_DYNAMIC) diff --git a/xoa_driver/internals/hli_v1/ports/port_l23/freya_l1.py b/xoa_driver/internals/hli_v1/ports/port_l23/freya_l1.py new file mode 100644 index 00000000..65d4d2aa --- /dev/null +++ b/xoa_driver/internals/hli_v1/ports/port_l23/freya_l1.py @@ -0,0 +1,515 @@ +from typing import ( + TYPE_CHECKING, + Tuple, +) +if TYPE_CHECKING: + from xoa_driver.internals.core import interfaces as itf +from xoa_driver.internals.commands import ( + PP_PRECODING, + PP_PRECODINGSTATUS, + PP_GRAYCODING, + PL1_AUTONEGINFO, + PL1_LINKTRAININFO, + PL1_LOG, + PL1_CFG_TMP, + PL1_LINKTRAIN_CMD, + PL1_CTRL, + PL1_GET_DATA, + PL1_PHYTXEQ_LEVEL, + PL1_PHYTXEQ_COEFF, + PL1_AUTONEG_STATUS, + PL1_AUTONEG_ABILITIES, + PL1_PCS_VARIANT, + PL1_AUTONEG_CONFIG, + PL1_ANLT, + PL1_PHYTXEQ, + PL1_LINKTRAIN_CONFIG, + PL1_LINKTRAIN_STATUS, + PP_PHYRXEQ_EXT, + PP_PHYRXEQSTATUS_EXT +) +from .pcs_pma_ghijkl import ( + Prbs, +) +from xoa_driver import enums + +class FreyaPMA: + """Freya PMA""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.precoding = PP_PRECODING(conn, module_id, port_id, serdes_xindex) + """GET/SET Pre-Coding Configurations. (only for Freya) + + :type: PP_PRECODING + """ + + self.graycoding = PP_GRAYCODING(conn, module_id, port_id, serdes_xindex) + """GET/SET Gray-Coding Configurations. (only for Freya) + + :type: PP_GRAYCODING + """ + +class FreyaSIV: + """Freya Signal Integrity View""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.control = PL1_CTRL(conn, module_id, port_id, serdes_xindex, enums.Layer1Control.SAMPLED_SIGNAL_INTEGRITY_SCAN) + """Control SIV scan. (only for Freya) + + :type: PL1_CTRL + """ + + self.data = PL1_GET_DATA(conn, module_id, port_id, serdes_xindex, enums.Layer1Control.SAMPLED_SIGNAL_INTEGRITY_SCAN) + """Get SIV scan data. (only for Freya) + + :type: PL1_GET_DATA + """ + +class FreyaTxTap: + """Freya Tx Tap""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.native = PL1_PHYTXEQ(conn, module_id, port_id, serdes_xindex) + """TX tap native value. (only for Freya) + + :type: PL1_PHYTXEQ + """ + + self.level = PL1_PHYTXEQ_LEVEL(conn, module_id, port_id, serdes_xindex) + """TX tap mV/dB value. (only for Freya) + + :type: PL1_PHYTXEQ_LEVEL + """ + + self.ieee = PL1_PHYTXEQ_COEFF(conn, module_id, port_id, serdes_xindex) + """TX tap IEEE coefficient value. (only for Freya) + + :type: PL1_PHYTXEQ_COEFF + """ + +class FreyaRxTapConfig: + """Freya Rx Tap Configuration""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.ctle_low = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.CTLE_LOW) + """RX tap CTLE LOW. (only for Freya) + """ + + self.ctle_high = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.CTLE_HIGH) + """RX tap CTLE HIGH. (only for Freya) + """ + + self.agc = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.AGC) + """RX tap Automatic Gain Control. (only for Freya) + """ + + self.oc = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.OC) + """RX tap Offset Cancellation. (only for Freya) + """ + + self.cdr = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.CDR) + """RX tap Clock and Data Recovery. (only for Freya) + """ + + self.pre_ffe_1 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_1) + """RX tap Pre Feed-Forward Equalizer #1. (only for Freya) + """ + + self.pre_ffe_2 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_2) + """RX tap Pre Feed-Forward Equalizer #2. (only for Freya) + """ + + self.pre_ffe_3 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_3) + """RX tap Pre Feed-Forward Equalizer #3. (only for Freya) + """ + + self.pre_ffe_4 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_4) + """RX tap Pre Feed-Forward Equalizer #4. (only for Freya) + """ + + self.pre_ffe_5 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_5) + """RX tap Pre Feed-Forward Equalizer #5. (only for Freya) + """ + + self.pre_ffe_6 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_6) + """RX tap Pre Feed-Forward Equalizer #6. (only for Freya) + """ + + self.pre_ffe_7 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_7) + """RX tap Pre Feed-Forward Equalizer #7. (only for Freya) + """ + + self.pre_ffe_8 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_8) + """RX tap Pre Feed-Forward Equalizer #8. (only for Freya) + """ + + self.dfe = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.DFE) + """RX tap Decision Feedback Equalization. (only for Freya) + """ + + self.post_ffe_1 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_1) + """RX tap Post Feed-Forward Equalizer #1. (only for Freya) + """ + + self.post_ffe_2 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_2) + """RX tap Post Feed-Forward Equalizer #2. (only for Freya) + """ + + self.post_ffe_3 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_3) + """RX tap Post Feed-Forward Equalizer #3. (only for Freya) + """ + + self.post_ffe_4 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_4) + """RX tap Post Feed-Forward Equalizer #4. (only for Freya) + """ + + self.post_ffe_5 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_5) + """RX tap Post Feed-Forward Equalizer #5. (only for Freya) + """ + + self.post_ffe_6 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_6) + """RX tap Post Feed-Forward Equalizer #6. (only for Freya) + """ + + self.post_ffe_7 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_7) + """RX tap Post Feed-Forward Equalizer #7. (only for Freya) + """ + + self.post_ffe_8 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_8) + """RX tap Post Feed-Forward Equalizer #8. (only for Freya) + """ + + self.post_ffe_9 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_9) + """RX tap Post Feed-Forward Equalizer #9. (only for Freya) + """ + + self.post_ffe_10 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_10) + """RX tap Post Feed-Forward Equalizer #10. (only for Freya) + """ + + self.post_ffe_11 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_11) + """RX tap Post Feed-Forward Equalizer #11. (only for Freya) + """ + + self.post_ffe_12 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_12) + """RX tap Post Feed-Forward Equalizer #12. (only for Freya) + """ + + self.post_ffe_13 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_13) + """RX tap Post Feed-Forward Equalizer #13. (only for Freya) + """ + + self.post_ffe_14 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_14) + """RX tap Post Feed-Forward Equalizer #14. (only for Freya) + """ + + self.post_ffe_15 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_15) + """RX tap Post Feed-Forward Equalizer #15. (only for Freya) + """ + + self.post_ffe_16 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_16) + """RX tap Post Feed-Forward Equalizer #16. (only for Freya) + """ + + self.post_ffe_17 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_17) + """RX tap Post Feed-Forward Equalizer #17. (only for Freya) + """ + + self.post_ffe_18 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_18) + """RX tap Post Feed-Forward Equalizer #18. (only for Freya) + """ + + self.post_ffe_19 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_19) + """RX tap Post Feed-Forward Equalizer #19. (only for Freya) + """ + + self.post_ffe_20 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_20) + """RX tap Post Feed-Forward Equalizer #20. (only for Freya) + """ + + self.post_ffe_21 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_21) + """RX tap Post Feed-Forward Equalizer #21. (only for Freya) + """ + + self.post_ffe_22 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_22) + """RX tap Post Feed-Forward Equalizer #22. (only for Freya) + """ + + self.post_ffe_23 = PP_PHYRXEQ_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_13) + """RX tap Post Feed-Forward Equalizer #23. (only for Freya) + """ + +class FreyaRxTapStatus: + """Freya Rx Tap Status""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.ctle_low = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.CTLE_LOW) + """RX tap CTLE LOW. (only for Freya) + """ + + self.ctle_high = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.CTLE_HIGH) + """RX tap CTLE HIGH. (only for Freya) + """ + + self.agc = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.AGC) + """RX tap Automatic Gain Control. (only for Freya) + """ + + self.oc = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.OC) + """RX tap Offset Cancellation. (only for Freya) + """ + + self.cdr = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.CDR) + """RX tap Clock and Data Recovery. (only for Freya) + """ + + self.pre_ffe_1 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_1) + """RX tap Pre Feed-Forward Equalizer #1. (only for Freya) + """ + + self.pre_ffe_2 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_2) + """RX tap Pre Feed-Forward Equalizer #2. (only for Freya) + """ + + self.pre_ffe_3 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_3) + """RX tap Pre Feed-Forward Equalizer #3. (only for Freya) + """ + + self.pre_ffe_4 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_4) + """RX tap Pre Feed-Forward Equalizer #4. (only for Freya) + """ + + self.pre_ffe_5 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_5) + """RX tap Pre Feed-Forward Equalizer #5. (only for Freya) + """ + + self.pre_ffe_6 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_6) + """RX tap Pre Feed-Forward Equalizer #6. (only for Freya) + """ + + self.pre_ffe_7 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_7) + """RX tap Pre Feed-Forward Equalizer #7. (only for Freya) + """ + + self.pre_ffe_8 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.PRE_FFE_8) + """RX tap Pre Feed-Forward Equalizer #8. (only for Freya) + """ + + self.dfe = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.DFE) + """RX tap Decision Feedback Equalization. (only for Freya) + """ + + self.post_ffe_1 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_1) + """RX tap Post Feed-Forward Equalizer #1. (only for Freya) + """ + + self.post_ffe_2 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_2) + """RX tap Post Feed-Forward Equalizer #2. (only for Freya) + """ + + self.post_ffe_3 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_3) + """RX tap Post Feed-Forward Equalizer #3. (only for Freya) + """ + + self.post_ffe_4 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_4) + """RX tap Post Feed-Forward Equalizer #4. (only for Freya) + """ + + self.post_ffe_5 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_5) + """RX tap Post Feed-Forward Equalizer #5. (only for Freya) + """ + + self.post_ffe_6 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_6) + """RX tap Post Feed-Forward Equalizer #6. (only for Freya) + """ + + self.post_ffe_7 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_7) + """RX tap Post Feed-Forward Equalizer #7. (only for Freya) + """ + + self.post_ffe_8 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_8) + """RX tap Post Feed-Forward Equalizer #8. (only for Freya) + """ + + self.post_ffe_9 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_9) + """RX tap Post Feed-Forward Equalizer #9. (only for Freya) + """ + + self.post_ffe_10 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_10) + """RX tap Post Feed-Forward Equalizer #10. (only for Freya) + """ + + self.post_ffe_11 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_11) + """RX tap Post Feed-Forward Equalizer #11. (only for Freya) + """ + + self.post_ffe_12 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_12) + """RX tap Post Feed-Forward Equalizer #12. (only for Freya) + """ + + self.post_ffe_13 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_13) + """RX tap Post Feed-Forward Equalizer #13. (only for Freya) + """ + + self.post_ffe_14 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_14) + """RX tap Post Feed-Forward Equalizer #14. (only for Freya) + """ + + self.post_ffe_15 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_15) + """RX tap Post Feed-Forward Equalizer #15. (only for Freya) + """ + + self.post_ffe_16 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_16) + """RX tap Post Feed-Forward Equalizer #16. (only for Freya) + """ + + self.post_ffe_17 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_17) + """RX tap Post Feed-Forward Equalizer #17. (only for Freya) + """ + + self.post_ffe_18 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_18) + """RX tap Post Feed-Forward Equalizer #18. (only for Freya) + """ + + self.post_ffe_19 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_19) + """RX tap Post Feed-Forward Equalizer #19. (only for Freya) + """ + + self.post_ffe_20 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_20) + """RX tap Post Feed-Forward Equalizer #20. (only for Freya) + """ + + self.post_ffe_21 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_21) + """RX tap Post Feed-Forward Equalizer #21. (only for Freya) + """ + + self.post_ffe_22 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_22) + """RX tap Post Feed-Forward Equalizer #22. (only for Freya) + """ + + self.post_ffe_23 = PP_PHYRXEQSTATUS_EXT(conn, module_id, port_id, serdes_xindex, enums.RxEqExtCap.POST_FFE_13) + """RX tap Post Feed-Forward Equalizer #23. (only for Freya) + """ + +class FreyaRxTap: + """Freya Rx tap + """ + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.config = FreyaRxTapConfig(conn, module_id, port_id, serdes_xindex) + """Freya Rx tap configuration + """ + self.status = FreyaRxTapStatus(conn, module_id, port_id, serdes_xindex) + """Freya Rx tap status + """ + +class FreyaMedium: + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + self.tx = FreyaTxTap(conn, module_id, port_id, serdes_xindex) + """Freya Tx tap + """ + self.rx = FreyaRxTap(conn, module_id, port_id, serdes_xindex) + """Freya Rx tap + """ + self.siv = FreyaSIV(conn, module_id, port_id, serdes_xindex) + """Freya Signal Integrity + """ + +class SerDesFreya: + """L23 high-speed port SerDes configuration and status.""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: + + self.prbs = Prbs(conn, module_id, port_id, serdes_xindex) + """PRBS + :type: Prbs + """ + + self.pma = FreyaPMA(conn, module_id, port_id, serdes_xindex) + """Freya PMA + + :type: FreyaPMA + """ + + self.medium = FreyaMedium(conn, module_id, port_id, serdes_xindex) + """Freya medium + + :type: FreyaMedium + """ + + self.lt_cmd = PL1_LINKTRAIN_CMD(conn, module_id, port_id, serdes_xindex) + """Link training command. + + :type: PP_LINKTRAIN + """ + + self.lt_info = PL1_LINKTRAININFO(conn, module_id, port_id, serdes_xindex, 0) + """Link training info. + + :type: PL1_LINKTRAININFO + """ + + self.lt_status = PL1_LINKTRAIN_STATUS(conn, module_id, port_id, serdes_xindex) + """Link training status. + + :type: PL1_LINKTRAIN_STATUS + """ + +class FreyaAutoNeg: + """Freya Autoneg""" + + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int) -> None: + self.info = PL1_AUTONEGINFO(conn, module_id, port_id, 0) + """Autoneg info + + :type: PL1_AUTONEGINFO + """ + + self.status = PL1_AUTONEG_STATUS(conn, module_id, port_id) + """Autoneg status + + :type: PL1_AUTONEG_STATUS + """ + + self.abilities = PL1_AUTONEG_ABILITIES(conn, module_id, port_id) + """Autoneg abilities + + :type: PL1_AUTONEG_ABILITIES + """ + + self.config = PL1_AUTONEG_CONFIG(conn, module_id, port_id) + """Autoneg configuration + + :type: PL1_AUTONEG_CONFIG + """ + +class FreyaANLT: + """Freya port-level anlt. For per-serdes configuration and status, use serdes[x] + """ + def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int) -> None: + self.an = FreyaAutoNeg(conn, module_id, port_id) + """Autoneg config and status + """ + self.ctrl = PL1_ANLT(conn, module_id, port_id) + """ANLT control + """ + self.lt_config = PL1_LINKTRAIN_CONFIG(conn, module_id, port_id) + """Port-level Link Training config + """ + self.log = PL1_LOG(conn, module_id, port_id) + """ANLT log + """ + +class Layer1: + def __init__(self, conn: "itf.IConnection", port) -> None: + self.serdes: Tuple[SerDesFreya, ...] = tuple( + SerDesFreya(conn, *port.kind, serdes_xindex=idx) + for idx in range(port.info.capabilities.serdes_count) + ) + self.anlt = FreyaANLT(conn, *port.kind) + """Freya port-level anlt. For per-serdes configuration and status, use serdes[x] + """ + self.pcs_variant = PL1_PCS_VARIANT(conn, *port.kind) + """PCS variant configuration + """ + + diff --git a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py index f801c52a..1de15ec4 100644 --- a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py +++ b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_ghijkl.py @@ -38,11 +38,6 @@ PP_PRBSTYPE, PP_PHYSETTINGS, PP_PHYRXEQ, - PP_PRECODING, - PP_GRAYCODING, - PP_PRECODINGSTATUS, - PL1_CTRL, - PL1_GET_DATA, ) from xoa_driver import enums @@ -338,29 +333,6 @@ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes :type: PP_PHYAUTOTUNE """ -class SDPma: - """L23 high-speed port PMA""" - - def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: - self.precoding_config = PP_PRECODING(conn, module_id, port_id, serdes_xindex) - """GET/SET Pre-Coding Configurations. (only for Freya) - - :type: PP_PRECODING - """ - - self.precoding_status = PP_PRECODINGSTATUS(conn, module_id, port_id, serdes_xindex) - """GET/SET Pre-Coding Configurations. (only for Freya) - - :type: PP_PRECODING - """ - - self.graycoding = PP_GRAYCODING(conn, module_id, port_id, serdes_xindex) - """GET/SET Gray-Coding Configurations. (only for Freya) - - :type: PP_GRAYCODING - """ - - class Prbs: """L23 high-speed port SerDes PRBS configuration and status.""" @@ -382,21 +354,7 @@ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes L23 high-speed port PRBS configuration. """ -class SivScan: - """Signal Integrity View""" - def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes_xindex: int) -> None: - self.control = PL1_CTRL(conn, module_id, port_id, serdes_xindex, enums.Layer1Control.SAMPLED_SIGNAL_INTEGRITY_SCAN) - """Control SIV scan - - :type: PL1_CTRL - """ - - self.data = PL1_GET_DATA(conn, module_id, port_id, serdes_xindex, enums.Layer1Control.SAMPLED_SIGNAL_INTEGRITY_SCAN) - """Get SIV scan data - - :type: PL1_GET_DATA - """ class SerDes: """L23 high-speed port SerDes configuration and status.""" @@ -420,16 +378,6 @@ def __init__(self, conn: "itf.IConnection", module_id: int, port_id: int, serdes :type: SDEyeDiagram """ - self.pma = SDPma(conn, module_id, port_id, serdes_xindex) - """PMA layer - - :type: SDPma - """ - - self.siv = SivScan(conn, module_id, port_id, serdes_xindex) - """Signal Integrity - """ - def __await__(self): return self._setup().__await__() diff --git a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py index 151a274a..11ca3498 100644 --- a/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py +++ b/xoa_driver/internals/hli_v1/ports/port_l23/pcs_pma_l.py @@ -41,8 +41,8 @@ def __init__(self, conn: "itf.IConnection", port) -> None: self.per_lane_status: Tuple[PP_LINKTRAINSTATUS, ...] = tuple( PP_LINKTRAINSTATUS(conn, *port.kind, _serdes_xindex=idx) - for idx in range(port.info.capabilities.lane_count) - ) # TODO: need to fix, currently port.info.capabilities must be none because virtual_lanes are created before awaiting the port + for idx in range(port.info.capabilities.serdes_count) + ) """Link training status. :type: PP_LINKTRAINSTATUS diff --git a/xoa_driver/internals/hli_v1/testers/_base_tester.py b/xoa_driver/internals/hli_v1/testers/_base_tester.py index 23f99ffa..df0bce30 100644 --- a/xoa_driver/internals/hli_v1/testers/_base_tester.py +++ b/xoa_driver/internals/hli_v1/testers/_base_tester.py @@ -27,6 +27,8 @@ C_SERIALNO, C_RESERVEDBY, C_FLASH, + C_MODEL_NAME, + C_MODEL_NUMBER, ) from xoa_driver.internals.core.funcs import establish_connection from xoa_driver.internals.core.transporter.handler import TransportationHandler @@ -99,6 +101,18 @@ def __init__(self, host: str, username: str, password: str = "xena", port: int = :type: C_MODEL """ + self.model_name = C_MODEL_NAME(self._conn) + """Specifies tester's model name. + + :type: C_MODEL_NAME + """ + + self.model_number = C_MODEL_NUMBER(self._conn) + """Specifies tester's model number. + + :type: C_MODEL_NUMBER + """ + self.version_no = C_VERSIONNO(self._conn) """Tester's version number.