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added missing brackets to RSH template

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1 parent 62ecf9b commit a038ebfd2c3894bb61cc4daf7ddcc57111bc3d10 @xeth137 committed Apr 23, 2012
Showing with 2 additions and 2 deletions.
  1. +2 −2 src/dcpu16.md
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@@ -395,8 +395,8 @@ reg: RSHI1(reg,reg) "?SET %c, %0\nSHR %c, %1\n" ncregop(a, 3
reg: RSHU1(reg,reg) "?SET %c, %0\nSHR %c, %1\n" ncregop(a, 3)
reg: RSHI1(bval,reg) "SET I, %1\nSET %c, %0\nSHR %c, I\n" 4
reg: RSHU1(bval,reg) "SET I, %1\nSET %c, %0\nSHR %c, I\n" 4
-stmt: ASGNI1(addr,RSHI1(bval,bval)) "SHR %0, %2\n" memop(a, 2)
-stmt: ASGNU1(addr,RSHU1(bval,bval)) "SHR %0, %2\n" memop(a, 2)
+stmt: ASGNI1(addr,RSHI1(bval,bval)) "SHR [%0], %2\n" memop(a, 2)
+stmt: ASGNU1(addr,RSHU1(bval,bval)) "SHR [%0], %2\n" memop(a, 2)
stmt: ASGNI1(addr,RSHI1(bval,bval)) "SET [%0], %1\nSHR %0, %2\n" ncmemop(a, 3)
stmt: ASGNU1(addr,RSHU1(bval,bval)) "SET [%0], %1\nSHR %0, %2\n" ncmemop(a, 3)
stmt: ASGNI1(addr,RSHI1(bval,mem)) "SET I, %2\nSET [%0], %1\nSHR [%0], I\n" 4

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