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[ARM] exynos: Minor sanity check in exynos4_mct_tick_isr()

There is some issue with latest QEMU due to which we get MCT L0 timer
interrupts on CPU1 instead of CPU0 despite explicitly setting irq affinity.

May be this is due to missing GIC combiner code for Exynos SOCs but
for now minor/harmless fix added by this patch fixes the Xvisor crash
on Exynos4 emulated by QEMU.

Signed-off-by: Anup Patel <anup@brainfault.org>
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commit 00066217bdfa9bffc2778924c095f62ad91d207d 1 parent f34b9b9
@avpatel avpatel authored
Showing with 14 additions and 4 deletions.
  1. +14 −4 arch/arm/board/common/exynos/mct.c
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18 arch/arm/board/common/exynos/mct.c
@@ -259,6 +259,8 @@ int __init exynos4_clockchip_init(virtual_addr_t base, u32 hirq,
{
int rc;
+ exynos4_sys_timer = (void *)base;
+
mct_comp_device.name = name;
mct_comp_device.hirq = hirq;
mct_comp_device.rating = rating;
@@ -417,8 +419,14 @@ static int exynos4_mct_tick_clear(struct mct_clock_event_clockchip *mevt)
static vmm_irq_return_t exynos4_mct_tick_isr(int irq_no, void *dev_id)
{
+ u32 cpu = vmm_smp_processor_id();
struct mct_clock_event_clockchip *mevt = dev_id;
+ /* If we got MCT interrupt on wrong CPU then ignore it. */
+ if (!vmm_cpumask_test_cpu(cpu, mevt->clkchip.cpumask)) {
+ return VMM_IRQ_NONE;
+ }
+
exynos4_mct_tick_clear(mevt);
mevt->clkchip.event_handler(&mevt->clkchip);
@@ -435,6 +443,8 @@ int __cpuinit exynos4_local_timer_init(virtual_addr_t timer_base, u32 hirq,
struct vmm_clockchip *evt;
u32 cpu = vmm_smp_processor_id();
+ exynos4_sys_timer = (void *)timer_base;
+
if (mct_int_type == MCT_INT_UNKNOWN) {
exynos4_timer_init();
}
@@ -466,8 +476,8 @@ int __cpuinit exynos4_local_timer_init(virtual_addr_t timer_base, u32 hirq,
if (mct_int_type == MCT_INT_SPI) {
if (vmm_smp_is_bootcpu()) {
rc = vmm_host_irq_register(EXYNOS4_IRQ_MCT_L0,
- "mct_tick0_irq",
- exynos4_mct_tick_isr, mevt);
+ mevt->name,
+ exynos4_mct_tick_isr, mevt);
if (rc) {
return rc;
}
@@ -481,7 +491,7 @@ int __cpuinit exynos4_local_timer_init(virtual_addr_t timer_base, u32 hirq,
}
} else {
rc = vmm_host_irq_register(EXYNOS4_IRQ_MCT_L1,
- "mct_tick1_irq",
+ mevt->name,
exynos4_mct_tick_isr, mevt);
if (rc) {
return rc;
@@ -497,7 +507,7 @@ int __cpuinit exynos4_local_timer_init(virtual_addr_t timer_base, u32 hirq,
}
} else {
rc = vmm_host_irq_register(EXYNOS_IRQ_MCT_LOCALTIMER,
- "mct_tick_irq",
+ "mct_tick_local",
exynos4_mct_tick_isr, mevt);
if (rc) {
return rc;
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