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Rewrite a terrible comment about the machine model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202576 91177308-0d34-0410-b5e6-96231b3b80d8
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commit abad3545bdf7d89ea9b8c8e0ba30edc45c0118bb 1 parent 06f2e69
Andrew Trick authored
Showing with 10 additions and 6 deletions.
  1. +10 −6 include/llvm/MC/MCSchedule.h
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16 include/llvm/MC/MCSchedule.h
@@ -32,12 +32,16 @@ struct MCProcResourceDesc {
// Number of resources that may be buffered.
//
- // Buffered resources (BufferSize > 0 || BufferSize == -1) may be consumed at
- // some indeterminate cycle after dispatch (e.g. for instructions that may
- // issue out-of-order). Unbuffered resources (BufferSize == 0) always consume
- // their resource some fixed number of cycles after dispatch (e.g. for
- // instruction interlocking that may stall the pipeline). If BufferSize==1,
- // the latency between producer and consumer is modeled as a stall.
+ // Buffered resources (BufferSize != 0) may be consumed at some indeterminate
+ // cycle after dispatch. This should be used for out-of-order cpus when
+ // instructions that use this resource can be buffered in a reservaton
+ // station.
+ //
+ // Unbuffered resources (BufferSize == 0) always consume their resource some
+ // fixed number of cycles after dispatch. If a resource is unbuffered, then
+ // the scheduler will avoid scheduling instructions with conflicting resources
+ // in the same cycle. This is for in-order cpus, or the in-order portion of
+ // an out-of-order cpus.
int BufferSize;
bool operator==(const MCProcResourceDesc &Other) const {
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