class AluNs
#(
	parameter int unsigned WIDTH = 8
);
	typedef enum logic [2]
	{
		OP_ADD,
		OP_ADC,
		OP_SUB,
		OP_SBC
	} Opcode;

	typedef struct
	{
		logic [WIDTH] a, b;
		logic carry;
		Opcode op;
	} Inp;

	typedef struct
	{
		logic [WIDTH] result;
		logic carry;
	} Outp;
endclass

module Alu
#(
	parameter int unsigned WIDTH = 8
)
(
	input AluNs#(.WIDTH(WIDTH)).Inp inp,
	output AluNs#(.WIDTH(WIDTH)).Outp outp
);

	always_comb
	begin
		case (inp.op)
		//--------
		AluNs#(.WIDTH(WIDTH)).OP_ADD:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, inp.b}
				+ {{WIDTH{1'b0}}, 1'b0};
		end

		AluNs#(.WIDTH(WIDTH)).OP_ADC:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, inp.b}
				+ {{WIDTH{1'b0}}, inp.carry};
		end

		AluNs#(.WIDTH(WIDTH)).OP_SUB:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, ~inp.b}
				+ {{WIDTH{1'b0}}, 1'b1};
		end

		AluNs#(.WIDTH(WIDTH)).OP_SBC:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, ~inp.b}
				+ {{WIDTH{1'b0}}, inp.carry};
		end

		default:
		begin
			{outp.carry, outp.result} = 0;
		end
		//--------
		endcase
	end

endmodule

module Alu
#(
	parameter int unsigned WIDTH = 8
)
(
	input AluNs#(.WIDTH(WIDTH)).Inp inp,
	output AluNs#(.WIDTH(WIDTH)).Outp outp
);

	always_comb
	begin
		case (inp.op)
		//--------
		Ns::OP_ADD:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, inp.b}
				+ {{WIDTH{1'b0}}, 1'b0};
		end

		Ns::OP_ADC:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, inp.b}
				+ {{WIDTH{1'b0}}, inp.carry};
		end

		Ns::OP_SUB:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, ~inp.b}
				+ {{WIDTH{1'b0}}, 1'b1};
		end

		Ns::OP_SBC:
		begin
			{outp.carry, outp.result} = {1'b0, inp.a} + {1'b0, ~inp.b}
				+ {{WIDTH{1'b0}}, inp.carry};
		end

		default:
		begin
			{outp.carry, outp.result} = 0;
		end
		//--------
		endcase
	end

endmodule