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drivers: apic_timer: fix include of system_timer.h

Fix path for system_timer.h and loapic.h, we moved it to
include/drivers/timer/ and include/drivers/interrupt_controller/

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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nashif authored and andrewboie committed Jun 27, 2019
1 parent a438e71 commit 0eee0a3c6c5ad8d5b10109d03de10ea21a2c6b1d
Showing with 4 additions and 4 deletions.
  1. +3 −3 drivers/timer/apic_timer.c
  2. +1 −1 include/arch/x86/msr.h
@@ -3,10 +3,10 @@
* SPDX-License-Identifier: Apache-2.0
*/

#include <drivers/system_timer.h>
#include <drivers/timer/system_timer.h>
#include <sys_clock.h>
#include <spinlock.h>
#include <drivers/loapic.h>
#include <drivers/interrupt_controller/loapic.h>

BUILD_ASSERT_MSG(!IS_ENABLED(CONFIG_SMP), "APIC timer doesn't support SMP");

@@ -40,7 +40,7 @@ BUILD_ASSERT_MSG(!IS_ENABLED(CONFIG_SMP), "APIC timer doesn't support SMP");
* found via CPUID 0x15 (n = EBX, m = EAX) on most CPUs.
*/

/* These should be merged into include/drivers/loapic.h. */
/* These should be merged into include/drivers/interrupt_controller/loapic.h. */

#define DCR_DIVIDER_MASK 0x0000000F /* divider bits */
#define DCR_DIVIDER 0x0000000B /* divide by 1 */
@@ -241,7 +241,7 @@
* MSRs 0x0800 to 0x0BFF are reserved for x2APIC access.
*
* We only record the base address here, as the local APIC code
* knows how to find the registers, see include/drivers/loapic.h.
* knows how to find the registers, see include/drivers/interrupt_controller/loapic.h.
*/

#define X86_X2APIC_BASE_MSR 0x0800

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