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arch: arc: typo fixes and comments clean up

typo fixes and comments clean up

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
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vonhust authored and andrewboie committed Jul 30, 2019
1 parent a39f5a8 commit 14db558939db60731d8d25a8c2e7788c528b6647
Showing with 2 additions and 6 deletions.
  1. +2 −6 arch/arc/core/isr_wrapper.S
@@ -60,10 +60,6 @@ IRQ stack frame layout:
low address
Registers not taken into account in the current implementation.
accl
acch
The context switch code adopts this standard so that it is easier to follow:
- r1 contains _kernel ASAP and is not overwritten over the lifespan of
@@ -104,7 +100,7 @@ done upfront, and the rest is done when needed:
o RIRQ
All needed regisers to run C code in the ISR are saved automatically
All needed registers to run C code in the ISR are saved automatically
on the outgoing thread's stack: loop, status32, pc, and the caller-
saved GPRs. That stack frame layout is pre-determined. If returning
to a thread, the stack is popped and no registers have to be saved by
@@ -178,7 +174,7 @@ From FIRQ:
o to any irq
The IRQ has saved the caller-saved registers in a stack frame, which must be
popped, and statu32 and pc loaded in status32_p0 and ilink.
popped, and status32 and pc loaded in status32_p0 and ilink.
From RIRQ:

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