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m2gl025_miv: workaround for issue #17851

This is the workaround suggested by Andy Ross to fix #17851.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
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Nicolas Pitre authored and carlescufi committed Aug 1, 2019
1 parent 5d0db51 commit 1593e52d6d3d10a78d48d02ce9fdc0c130e0e7b3
Showing with 3 additions and 0 deletions.
  1. +3 −0 boards/riscv32/m2gl025_miv/m2gl025_miv_defconfig
@@ -13,3 +13,6 @@ CONFIG_PLIC=y
CONFIG_RISCV_MACHINE_TIMER=y
CONFIG_GPIO=n
CONFIG_XIP=y

# Workaround for incorect SYS_CLOCK_HW_CYCLES_PER_SEC
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100

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