From 1e2d42273ed07b948f974b90b84168e711df2212 Mon Sep 17 00:00:00 2001 From: Wayne Ren Date: Thu, 1 Aug 2019 14:25:50 +0800 Subject: [PATCH] boards: nsim: add initial support of normal/non-secure application normal/non-secure application: nsim_sem_normal Signed-off-by: Wayne Ren --- boards/arc/nsim/arc_mpu_regions.c | 12 +++++++ boards/arc/nsim/nsim_sem.dts | 24 +++++++++++--- boards/arc/nsim/nsim_sem_defconfig | 1 + .../nsim/nsim_sem_mpu_stack_guard_defconfig | 1 + boards/arc/nsim/nsim_sem_normal.dts | 33 +++++++++++++++++++ boards/arc/nsim/nsim_sem_normal.yaml | 11 +++++++ boards/arc/nsim/nsim_sem_normal_defconfig | 16 +++++++++ soc/arc/snps_nsim/Kconfig.defconfig.em | 2 +- soc/arc/snps_nsim/Kconfig.defconfig.sem | 2 +- 9 files changed, 95 insertions(+), 7 deletions(-) create mode 100644 boards/arc/nsim/nsim_sem_normal.dts create mode 100644 boards/arc/nsim/nsim_sem_normal.yaml create mode 100644 boards/arc/nsim/nsim_sem_normal_defconfig diff --git a/boards/arc/nsim/arc_mpu_regions.c b/boards/arc/nsim/arc_mpu_regions.c index 0f98c800d4115c..15e17f8af59871 100644 --- a/boards/arc/nsim/arc_mpu_regions.c +++ b/boards/arc/nsim/arc_mpu_regions.c @@ -9,6 +9,10 @@ #include #include +/* + * for secure firmware, MPU entries are only set up for secure world. + * All regions not listed here are shared by secure world and normal world. + */ static struct arc_mpu_region mpu_regions[] = { #if DT_ICCM_SIZE > 0 /* Region ICCM */ @@ -24,11 +28,19 @@ static struct arc_mpu_region mpu_regions[] = { DT_DCCM_SIZE * 1024, REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC), #endif + +/* + * Region peripheral is shared by secure world and normal world by default, + * no need a static mpu entry. If some peripherals belong to secure world, + * add it here. + */ +#ifndef CONFIG_ARC_SECURE_FIRMWARE /* Region Peripheral */ MPU_REGION_ENTRY("PERIPHERAL", 0xF0000000, 64 * 1024, REGION_KERNEL_RAM_ATTR), +#endif }; struct arc_mpu_config mpu_config = { diff --git a/boards/arc/nsim/nsim_sem.dts b/boards/arc/nsim/nsim_sem.dts index f023c9e02b3b31..61358c9210c4b7 100644 --- a/boards/arc/nsim/nsim_sem.dts +++ b/boards/arc/nsim/nsim_sem.dts @@ -1,18 +1,32 @@ /* - * Copyright (c) 2018, 2019, Synopsys, Inc. All rights reserved. + * Copyright (c) 2018, Synopsys, Inc. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 */ + /dts-v1/; #include "nsim_em.dtsi" / { - model = "snps,nsim_sem"; + + model = "nsim_sem"; compatible = "snps,nsim_sem"; -}; -&cpu0 { - clock-frequency = <5000000>; + iccm0: iccm@0 { + device_type = "memory"; + compatible = "arc,iccm"; + reg = <0x0 0x40000>; + }; + + dccm0: dccm@80000000 { + device_type = "memory"; + compatible = "arc,dccm"; + reg = <0x80000000 0x40000>; + }; + + chosen { + zephyr,sram = &dccm0; + }; }; diff --git a/boards/arc/nsim/nsim_sem_defconfig b/boards/arc/nsim/nsim_sem_defconfig index 5718c8bf3e1dc8..b2a721f69eb7c2 100644 --- a/boards/arc/nsim/nsim_sem_defconfig +++ b/boards/arc/nsim/nsim_sem_defconfig @@ -16,3 +16,4 @@ CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_ARC_EXCEPTION_DEBUG=y +CONFIG_TRUSTED_EXECUTION_SECURE=y diff --git a/boards/arc/nsim/nsim_sem_mpu_stack_guard_defconfig b/boards/arc/nsim/nsim_sem_mpu_stack_guard_defconfig index 78e027d4d7b05c..d2a02a2eeb8f30 100644 --- a/boards/arc/nsim/nsim_sem_mpu_stack_guard_defconfig +++ b/boards/arc/nsim/nsim_sem_mpu_stack_guard_defconfig @@ -17,3 +17,4 @@ CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_ARC_EXCEPTION_DEBUG=y +CONFIG_TRUSTED_EXECUTION_SECURE=y \ No newline at end of file diff --git a/boards/arc/nsim/nsim_sem_normal.dts b/boards/arc/nsim/nsim_sem_normal.dts new file mode 100644 index 00000000000000..8e8cffcf32da48 --- /dev/null +++ b/boards/arc/nsim/nsim_sem_normal.dts @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2018, Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "nsim_em.dtsi" + +/ { + + model = "nsim_sem_normal"; + compatible = "snps,nsim_sem_normal"; + + iccm0: iccm@0 { + device_type = "memory"; + compatible = "arc,iccm"; + reg = <0x40000 DT_SIZE_K(256)>; + }; + + dccm0: dccm@80000000 { + device_type = "memory"; + compatible = "arc,dccm"; + reg = <0x80040000 DT_SIZE_K(256)>; + }; + + chosen { + zephyr,sram = &dccm0; + }; + +}; diff --git a/boards/arc/nsim/nsim_sem_normal.yaml b/boards/arc/nsim/nsim_sem_normal.yaml new file mode 100644 index 00000000000000..c940a46e72522b --- /dev/null +++ b/boards/arc/nsim/nsim_sem_normal.yaml @@ -0,0 +1,11 @@ +identifier: nsim_sem_normal +name: SEM in normal mode of Nsim simulator +type: mcu +arch: arc +simulation: nsim +toolchain: + - zephyr +testing: + ignore_tags: + - net + - bluetooth diff --git a/boards/arc/nsim/nsim_sem_normal_defconfig b/boards/arc/nsim/nsim_sem_normal_defconfig new file mode 100644 index 00000000000000..0d3578f4b56686 --- /dev/null +++ b/boards/arc/nsim/nsim_sem_normal_defconfig @@ -0,0 +1,16 @@ +CONFIG_ARC=y +CONFIG_CPU_ARCEM=y +CONFIG_SOC_NSIM=y +CONFIG_SOC_NSIM_SEM=y +CONFIG_BOARD_NSIM=y +CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 +CONFIG_XIP=n +CONFIG_BUILD_OUTPUT_BIN=n +CONFIG_PRINTK=y +CONFIG_ARCV2_INTERRUPT_UNIT=y +CONFIG_ARCV2_TIMER=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_ARC_EXCEPTION_DEBUG=y +CONFIG_TRUSTED_EXECUTION_NONSECURE=y diff --git a/soc/arc/snps_nsim/Kconfig.defconfig.em b/soc/arc/snps_nsim/Kconfig.defconfig.em index dc50572552c576..ba19eeb5d7207a 100644 --- a/soc/arc/snps_nsim/Kconfig.defconfig.em +++ b/soc/arc/snps_nsim/Kconfig.defconfig.em @@ -16,7 +16,7 @@ config NUM_IRQ_PRIO_LEVELS config NUM_IRQS # must be > the highest interrupt number used - default 20 + default 30 config ARC_MPU_VER default 2 diff --git a/soc/arc/snps_nsim/Kconfig.defconfig.sem b/soc/arc/snps_nsim/Kconfig.defconfig.sem index b605ff91922a73..f832dba93ebe94 100644 --- a/soc/arc/snps_nsim/Kconfig.defconfig.sem +++ b/soc/arc/snps_nsim/Kconfig.defconfig.sem @@ -16,7 +16,7 @@ config NUM_IRQ_PRIO_LEVELS config NUM_IRQS # must be > the highest interrupt number used - default 22 + default 30 config ARC_MPU_VER default 3