Skip to content
Permalink
Browse files

soc: riscv32: sifive-freedom: soc.h: use defines from device tree

Use values generated from the device tree in RISCV_ROM_BASE,
RISCV_ROM_SIZE, RISCV_RAM_BASE, RISCV_RAM_SIZE macros.

Signed-off-by: Filip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
  • Loading branch information...
fkokosinski authored and MaureenHelm committed Apr 30, 2019
1 parent 6fcfb83 commit 2b61c37d04d6e16a5e3aa475ba1d8b52382cf8b3
Showing with 3 additions and 2 deletions.
  1. +3 −2 soc/riscv32/riscv-privilege/sifive-freedom/soc.h
@@ -12,6 +12,7 @@
#define __RISCV32_SIFIVE_FREEDOM_SOC_H_

#include <soc_common.h>
#include <generated_dts_board.h>

/* PINMUX Configuration */
#define SIFIVE_PINMUX_0_BASE_ADDR (DT_SIFIVE_GPIO_0_BASE_ADDR + 0x38)
@@ -40,7 +41,7 @@
#define SIFIVE_BACKUP_REG_BASE 0x10000080

/* lib-c hooks required RAM defined variables */
#define RISCV_RAM_BASE CONFIG_RISCV_RAM_BASE_ADDR
#define RISCV_RAM_SIZE CONFIG_RISCV_RAM_SIZE
#define RISCV_RAM_BASE DT_SRAM_BASE_ADDRESS
#define RISCV_RAM_SIZE KB(DT_SRAM_SIZE)

#endif /* __RISCV32_SIFIVE_FREEDOM_SOC_H_ */

0 comments on commit 2b61c37

Please sign in to comment.
You can’t perform that action at this time.