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dts/arm/microchip: Mark uart & i2c nodes as disabled by default

Have the SoC dtsi files for microchip mark the devices (uart & i2c) as
disabled by default and let the board dts files enable which one's they
need/use (which is what's happening already).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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galak committed Jul 17, 2019
1 parent 39425ea commit 3c8f8cb25685d9965d8c55e9fa02cb71a0900d00
@@ -37,6 +37,7 @@
current-speed = <38400>;
label = "UART_0";
reg-shift = <0>;
status = "disabled";
};
uart1: uart@400f2800 {
compatible = "ns16550";
@@ -45,6 +46,7 @@
current-speed = <38400>;
label = "UART_1";
reg-shift = <0>;
status = "disabled";
};
uart2: uart@400f2c00 {
compatible = "ns16550";
@@ -53,6 +55,7 @@
current-speed = <38400>;
label = "UART_2";
reg-shift = <0>;
status = "disabled";
};
gpioa: gpio@40081000 {
compatible = "microchip,xec-gpio";
@@ -109,6 +112,7 @@
label = "I2C_0";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@40004400 {
compatible = "microchip,xec-i2c";
@@ -117,6 +121,7 @@
label = "I2C_1";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@40004800 {
compatible = "microchip,xec-i2c";
@@ -125,6 +130,7 @@
label = "I2C_2";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@40004c00 {
compatible = "microchip,xec-i2c";
@@ -133,6 +139,7 @@
label = "I2C_3";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: i2c@40005000 {
compatible = "microchip,xec-i2c";
@@ -141,6 +148,7 @@
label = "I2C_4";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
};
@@ -35,6 +35,7 @@
current-speed = <38400>;
label = "UART_0";
reg-shift = <0>;
status = "disabled";
};
uart1: uart@400f2800 {
compatible = "ns16550";
@@ -43,6 +44,7 @@
current-speed = <38400>;
label = "UART_1";
reg-shift = <0>;
status = "disabled";
};
};
};
@@ -13,8 +13,14 @@

#define DT_NUM_IRQ_PRIO_BITS \
DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_NS16550_REG_SHIFT \
DT_NS16550_400F2400_REG_SHIFT
#if defined(DT_NS16550_400F2400_REG_SHIFT)
#define DT_NS16550_REG_SHIFT DT_NS16550_400F2400_REG_SHIFT
#elif defined(DT_NS16550_400F2800_REG_SHIFT)
#define DT_NS16550_REG_SHIFT DT_NS16550_400F2800_REG_SHIFT
#elif defined(DT_NS16550_400F2C00_REG_SHIFT)
#define DT_NS16550_REG_SHIFT DT_NS16550_400F2C00_REG_SHIFT
#endif

#define DT_UART_NS16550_PORT_0_BASE_ADDR \
DT_NS16550_400F2400_BASE_ADDRESS
#define DT_UART_NS16550_PORT_0_CLK_FREQ 1843200
@@ -8,7 +8,13 @@


#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_NS16550_REG_SHIFT DT_NS16550_400F2400_REG_SHIFT

#if defined(DT_NS16550_400F2400_REG_SHIFT)
#define DT_NS16550_REG_SHIFT DT_NS16550_400F2400_REG_SHIFT
#elif defined(DT_NS16550_400F2800_REG_SHIFT)
#define DT_NS16550_REG_SHIFT DT_NS16550_400F2800_REG_SHIFT
#endif

#define DT_UART_NS16550_PORT_0_BASE_ADDR DT_NS16550_400F2400_BASE_ADDRESS
#define DT_UART_NS16550_PORT_0_CLK_FREQ 1843200
#define DT_UART_NS16550_PORT_0_NAME DT_NS16550_400F2400_LABEL

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