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ext/hal/st/stm32cube/stm32l1xx: rename SVC_IRQn -> SVCall_IRQn

SVCall_IRQn is used as enum value for SV Call Interrupt for Cortex-M
based SoCs for which CPU_CORTEX_M_HAS_BASEPRI=y. However stm32cube
for stm32l1xx uses SVC_IRQn enum value for this purpose.
This leads to this error:

  arch/arm/include/cortex_m/exc.h:101:19: error: 'SVCall_IRQn'
    undeclared (first use in this function); did you mean 'SVC_IRQn'?

    NVIC_SetPriority(SVCall_IRQn, _EXC_SVC_PRIO);
                     ^~~~~~~~~~~
                     SVC_IRQn

NB: ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xb.h file was already
fixed in 9f82604 ('ext: hal: st: stm32cube: Add HAL for
the STM32L1x series').

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
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frantony authored and galak committed Apr 29, 2019
1 parent c741ef6 commit 43c4c9c50731e0507f54f6d99485795aedff0236
@@ -33,3 +33,46 @@ License:

License Link:
http://www.st.com/resource/en/license_agreement/dm00218346.pdf

Patch List:

*ext/hal/st/stm32cube/stm32l1xx: rename SVC_IRQn -> SVCall_IRQn

SVCall_IRQn is used as enum value for SV Call Interrupt for Cortex-M
based SoCs for which CPU_CORTEX_M_HAS_BASEPRI=y. However stm32cube
for stm32l1xx uses SVC_IRQn enum value for this purpose.
This leads to this error:

arch/arm/include/cortex_m/exc.h:101:19: error: 'SVCall_IRQn'
undeclared (first use in this function); did you mean 'SVC_IRQn'?

NVIC_SetPriority(SVCall_IRQn, _EXC_SVC_PRIO);
^~~~~~~~~~~
SVC_IRQn

NB: ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xb.h file was already
fixed in 9f8260457b86 ('ext: hal: st: stm32cube: Add HAL for
the STM32L1x series').
Impacted files:
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l100xb.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l100xba.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l100xc.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xba.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xc.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xca.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xd.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xdx.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xe.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xb.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xba.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xc.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xca.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xd.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xdx.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xe.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l162xc.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l162xca.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l162xd.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l162xdx.h
ext/hal/st/stm32cube/stm32l1xx/soc/stm32l162xe.h
ST Bug tracker ID: 66029
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
@@ -90,7 +90,7 @@ typedef enum
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVC_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */

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