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drivers: i2c: Add SAM0 I2C driver
This adds a SERCOM I2C driver for SAM0 series chips.

Tested with a SAMD21 chip on a SSD1306 display and a MLX90393
sensor.  Only compile tested for SAMD20 and SAMR21.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
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Sizurka authored and nashif committed May 7, 2019
1 parent 2669383 commit 46730e1
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Showing 6 changed files with 874 additions and 0 deletions.
1 change: 1 addition & 0 deletions drivers/i2c/CMakeLists.txt
Expand Up @@ -21,6 +21,7 @@ zephyr_library_sources_ifdef(CONFIG_I2C_SIFIVE i2c_sifive.c)
zephyr_library_sources_ifdef(CONFIG_I2C_NIOS2 i2c_nios2.c) zephyr_library_sources_ifdef(CONFIG_I2C_NIOS2 i2c_nios2.c)
zephyr_library_sources_ifdef(CONFIG_I2C_GECKO i2c_gecko.c) zephyr_library_sources_ifdef(CONFIG_I2C_GECKO i2c_gecko.c)
zephyr_library_sources_ifdef(CONFIG_I2C_RV32M1_LPI2C i2c_rv32m1_lpi2c.c) zephyr_library_sources_ifdef(CONFIG_I2C_RV32M1_LPI2C i2c_rv32m1_lpi2c.c)
zephyr_library_sources_ifdef(CONFIG_I2C_SAM0 i2c_sam0.c)


zephyr_library_sources_ifdef(CONFIG_I2C_STM32_V1 zephyr_library_sources_ifdef(CONFIG_I2C_STM32_V1
i2c_ll_stm32_v1.c i2c_ll_stm32_v1.c
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1 change: 1 addition & 0 deletions drivers/i2c/Kconfig
Expand Up @@ -27,6 +27,7 @@ source "drivers/i2c/Kconfig.qmsi"
source "drivers/i2c/Kconfig.sbcon" source "drivers/i2c/Kconfig.sbcon"
source "drivers/i2c/Kconfig.sifive" source "drivers/i2c/Kconfig.sifive"
source "drivers/i2c/Kconfig.stm32" source "drivers/i2c/Kconfig.stm32"
source "drivers/i2c/Kconfig.sam0"




config I2C_INIT_PRIORITY config I2C_INIT_PRIORITY
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26 changes: 26 additions & 0 deletions drivers/i2c/Kconfig.sam0
@@ -0,0 +1,26 @@
#
# Copyright (c) 2019 Derek Hageman <hageman@inthat.cloud>
#
# SPDX-License-Identifier: Apache-2.0
#

if SOC_FAMILY_SAM0

menuconfig I2C_SAM0
bool "SAM0 series I2C SERCOM driver"
default y
select HAS_DTS_I2C
help
Enable the SAM0 series SERCOM I2C driver.

config I2C_SAM0_DMA_DRIVEN
bool "Enable DMA support for SAM0 I2C devices"
depends on I2C_SAM0
select DMA
help
This enables DMA driven transactions for the I2C peripheral.
DMA driven mode requires fewer interrupts to handle the
transaction and ensures that high speed modes are not delayed
by data reloading.

endif # SOC_FAMILY_SAM0

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