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drivers: usb/stm32: use dts information to populate clock settings

This patch populates "clocks" property in stm32 usb nodes
for clock related usb configuration code of each  dtsi files

Signed-off-by: Francois Ramu <francois.ramu@st.com>
  • Loading branch information...
FRASTM authored and galak committed Jul 15, 2019
1 parent 8e11970 commit 474c99c9ef7f72744bb08cbfaaa67545036f1692
@@ -196,29 +196,8 @@ static int usb_dc_stm32_clock_enable(void)
{
struct device *clk = device_get_binding(STM32_CLOCK_CONTROL_NAME);
struct stm32_pclken pclken = {

#ifdef DT_USB_HS_BASE_ADDRESS
.bus = STM32_CLOCK_BUS_AHB1,
.enr = LL_AHB1_GRP1_PERIPH_OTGHS
#else /* DT_USB_HS_BASE_ADDRESS */

#ifdef USB
.bus = STM32_CLOCK_BUS_APB1,
.enr = LL_APB1_GRP1_PERIPH_USB,

#else /* USB_OTG_FS */

#ifdef CONFIG_SOC_SERIES_STM32F1X
.bus = STM32_CLOCK_BUS_AHB1,
.enr = LL_AHB1_GRP1_PERIPH_OTGFS,
#else
.bus = STM32_CLOCK_BUS_AHB2,
.enr = LL_AHB2_GRP1_PERIPH_OTGFS,
#endif /* CONFIG_SOC_SERIES_STM32F1X */

#endif /* USB */

#endif /* DT_USB_HS_BASE_ADDRESS */
.bus = DT_USB_CLOCK_BUS,
.enr = DT_USB_CLOCK_BITS,
};

/*
@@ -33,6 +33,7 @@
num-bidir-endpoints = <8>;
ram-size = <1024>;
phys = <&usb_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
status = "disabled";
label= "USB";
};
@@ -61,6 +61,7 @@
num-bidir-endpoints = <8>;
ram-size = <1024>;
phys = <&usb_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
status = "disabled";
label= "USB";
};
@@ -39,6 +39,7 @@
num-bidir-endpoints = <8>;
ram-size = <512>;
status = "disabled";
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
phys = <&usb_fs_phy>;
label= "USB";
};
@@ -208,6 +208,7 @@
num-bidir-endpoints = <4>;
ram-size = <1280>;
maximum-speed = "full-speed";
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
phys = <&otgfs_phy>;
status = "disabled";
label = "OTGFS";
@@ -171,6 +171,7 @@
num-bidir-endpoints = <8>;
ram-size = <512>;
phys = <&usb_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
status = "disabled";
label= "USB";
};
@@ -217,6 +217,7 @@
ram-size = <1280>;
maximum-speed = "full-speed";
phys = <&otgfs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;
status = "disabled";
label= "OTGFS";
};
@@ -172,6 +172,7 @@
ram-size = <4096>;
maximum-speed = "full-speed";
phys = <&otghs_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
status = "disabled";
label= "OTGHS";
};
@@ -30,6 +30,7 @@
ram-size = <4096>;
maximum-speed = "full-speed";
phys = <&otghs_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
status = "disabled";
label= "OTGHS";
};
@@ -571,6 +571,7 @@
ram-size = <1280>;
maximum-speed = "full-speed";
phys = <&otgfs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;
status = "disabled";
label = "OTGFS";
};
@@ -583,6 +584,7 @@
num-bidir-endpoints = <9>;
ram-size = <4096>;
maximum-speed = "full-speed";
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x20000000>;
phys = <&otghs_fs_phy>;
status = "disabled";
label= "OTGHS";
@@ -65,6 +65,7 @@
num-bidir-endpoints = <8>;
ram-size = <1024>;
phys = <&otgfs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
status = "disabled";
label= "USB";
};
@@ -64,6 +64,7 @@
num-bidir-endpoints = <8>;
ram-size = <1024>;
phys = <&otgfs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
status = "disabled";
label= "USB";
};
@@ -16,6 +16,7 @@
num-bidir-endpoints = <8>;
ram-size = <1024>;
phys = <&usb_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
status = "disabled";
label = "USB";
};
@@ -36,6 +36,7 @@
num-bidir-endpoints = <8>;
ram-size = <1024>;
phys = <&usb_fs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
status = "disabled";
label = "USB";
};
@@ -17,6 +17,7 @@
ram-size = <1280>;
maximum-speed = "full-speed";
phys = <&otgfs_phy>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
status = "disabled";
label= "OTGFS";
};
@@ -139,6 +139,7 @@
num-bidir-endpoints = <6>;
ram-size = <1280>;
maximum-speed = "full-speed";
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
phys = <&otgfs_phy>;
status = "disabled";
label= "OTGFS";
@@ -33,3 +33,9 @@ properties:
type: array
category: optional
description: PHY provider specifier

clocks:
type: array
category: required
description: Clock gate control information
generation: define
@@ -33,3 +33,9 @@ properties:
type: array
category: optional
description: PHY provider specifier

clocks:
type: array
category: required
description: Clock gate control information
generation: define
@@ -45,3 +45,10 @@ properties:
category: optional
description: For STM32F0 series SoCs on QFN28 and TSSOP20 packages
enable PIN pair PA11/12 mapped instead of PA9/10 (e.g. stm32f070x6)
generation: define

clocks:
type: array
category: required
description: Clock gate control information
generation: define
@@ -127,6 +127,8 @@
#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS

#ifdef DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP
#define DT_USB_ENABLE_PIN_REMAP DT_ST_STM32_USB_40005C00_ENABLE_PIN_REMAP
@@ -156,6 +156,8 @@
#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS

#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
#define DT_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
@@ -145,6 +145,8 @@
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS

#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL

@@ -151,6 +151,8 @@
#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS

#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL
#define DT_PWM_STM32_1_PRESCALER DT_ST_STM32_PWM_40012C00_PWM_ST_PRESCALER
@@ -290,6 +290,8 @@
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
#endif /* DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */

#ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
@@ -299,6 +301,8 @@
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_OTGHS_40040000_RAM_SIZE
#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGHS_40040000_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGHS_40040000_CLOCK_BUS
#endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */

#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40010000_PWM_LABEL
@@ -266,6 +266,8 @@
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
#endif /* DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS */

#ifdef DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS
@@ -275,6 +277,8 @@
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGHS_40040000_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_OTGHS_40040000_RAM_SIZE
#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGHS_40040000_MAXIMUM_SPEED
#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGHS_40040000_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGHS_40040000_CLOCK_BUS
#endif /* DT_ST_STM32_OTGHS_40040000_BASE_ADDRESS */

#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40010000_PWM_LABEL
@@ -130,6 +130,8 @@
#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40005C00_IRQ_USB_PRIORITY
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40005C00_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40005C00_RAM_SIZE
#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40005C00_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40005C00_CLOCK_BUS

#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL

@@ -218,6 +218,8 @@
#define DT_USB_IRQ_PRI DT_ST_STM32_USB_40006800_IRQ_USB_PRIORITY
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_USB_40006800_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_USB_40006800_RAM_SIZE
#define DT_USB_CLOCK_BITS DT_ST_STM32_USB_40006800_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_USB_40006800_CLOCK_BUS
#endif

#if defined(DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS)
@@ -227,6 +229,8 @@
#define DT_USB_NUM_BIDIR_ENDPOINTS DT_ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define DT_USB_RAM_SIZE DT_ST_STM32_OTGFS_50000000_RAM_SIZE
#define DT_USB_MAXIMUM_SPEED DT_ST_STM32_OTGFS_50000000_MAXIMUM_SPEED
#define DT_USB_CLOCK_BITS DT_ST_STM32_OTGFS_50000000_CLOCK_BITS
#define DT_USB_CLOCK_BUS DT_ST_STM32_OTGFS_50000000_CLOCK_BUS
#endif

#define DT_PWM_STM32_1_DEV_NAME DT_ST_STM32_PWM_40012C00_PWM_LABEL

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