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boards : arm : Add support for Microchip MEC15xx EVB ASSY 6853
This was tested with the hello world application. UART 0 was used as console for displaying "Hello World! mec15xxevb_assy6853" to the serial terminal. Signed-off-by: Scott Worley <scott.worley@microchip.com> soc : arm : microchip_mec Use rename fault clear function The Cortex-M core function to clear faults was rename by upstream. Update to use new name. Signed-off-by: Scott Worley <scott.worley@microchip.com>
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# | ||
# Copyright (c) 2019 Microchip Technology Inc. | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
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zephyr_library() | ||
zephyr_library_sources(pinmux.c) |
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# | ||
# Copyright (c) 2019, Intel Corporation | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
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config BOARD_MEC15XXEVB_ASSY6853 | ||
bool "Microchip MEC15XX EVB ASSY 6853 Development board" | ||
depends on SOC_MEC1501_HSZ |
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# | ||
# Copyright (c) 2019 Intel Corporation | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
if BOARD_MEC15XXEVB_ASSY6853 | ||
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config BOARD | ||
default "mec15xxevb_assy6853" | ||
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if UART_NS16550 | ||
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config UART_NS16550_PORT_0 | ||
def_bool y if UART_CONSOLE | ||
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endif | ||
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endif #BOARD_MEC15XXEVB_ASSY6853 |
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/* | ||
* Copyright (c) 2015 Intel Corporation | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#ifndef __INC_BOARD_H | ||
#define __INC_BOARD_H | ||
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#include <soc.h> | ||
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#endif /* __INC_BOARD_H */ |
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.. _mec15xxevb_assy6853: | ||
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MEC15xxEVB ASSY6853 | ||
################### | ||
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Overview | ||
******** | ||
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The MEC15xxEVB_ASSY6853 kit is a future development platform to evaluate the | ||
Microchip MEC15XX series microcontrollers. This board needs to be mated with | ||
part number MEC1501 144WFBA SOLDER DC ASSY 6860(cpu board) in order to operate. | ||
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.. image:: ./mec15xxevb_assy6853.jpg | ||
:width: 500px | ||
:align: center | ||
:alt: MEC15XX EVB ASSY 6853 | ||
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Hardware | ||
******** | ||
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- MEC1501HB0SZ ARM Cortex-M4 Processor | ||
- 256 KB RAM and 64 KB boot ROM | ||
- Keyboard interface | ||
- ADC & GPIO headers | ||
- UART0, UART1, and UART2 | ||
- FAN0, FAN1, FAN2 headers | ||
- FAN PWM interface | ||
- JTAG/SWD, ETM and MCHP Trace ports | ||
- PECI interface 3.0 | ||
- I2C voltage translator | ||
- 10 SMBUS headers | ||
- 4 SGPIO headers | ||
- VCI interface | ||
- 5 independent Hardware Driven PS/2 Ports | ||
- eSPI header | ||
- 3 Breathing/Blinking LEDs | ||
- 2 Sockets for SPI NOR chips | ||
- One reset and VCC_PWRDGD pushbuttons | ||
- One external PCA9555 I/O port with jumper selectable I2C address. | ||
- One external LTC2489 delta-sigma ADC with jumper selectable I2C address. | ||
- Board power jumper selectable from +5V 2.1mm/5.5mm barrel connector or USB Micro A connector. | ||
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For more information about the SOC please see the `MEC1501 Reference Manual`_ | ||
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Supported Features | ||
================== | ||
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The mec15xxevb_assy6853 board configuration supports the following hardware | ||
features: | ||
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+-----------+------------+-------------------------------------+ | ||
| Interface | Controller | Driver/Component | | ||
+===========+============+=====================================+ | ||
| NVIC | on-chip | nested vector interrupt controller | | ||
+-----------+------------+-------------------------------------+ | ||
| SYSTICK | on-chip | systick | | ||
+-----------+------------+-------------------------------------+ | ||
| UART | on-chip | serial port | | ||
+-----------+------------+-------------------------------------+ | ||
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Other hardware features are not currently supported by Zephyr (at the moment) | ||
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The default configuration can be found in the | ||
:zephyr_file:`boards/arm/mec15xxevb_assy6853/mec15xxevb_assy6853_defconfig` | ||
Kconfig file. | ||
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Connections and IOs | ||
=================== | ||
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Microchip to provide the schematic for this board. | ||
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System Clock | ||
============ | ||
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The MEC1501 MCU is configured to use the 48Mhz internal oscillator with the | ||
on-chip PLL to generate a resulting EC clock rate of 12 MHz. See Processor clock | ||
control register in chapter 4 "4.0 POWER, CLOCKS, and RESETS" of the data sheet in | ||
the references at the end of this document. | ||
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Serial Port | ||
=========== | ||
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UART0 is configured for serial logs. | ||
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Jumper settings | ||
*************** | ||
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Please follow the jumper settings below to properly demo this | ||
board. Advanced users may deviate from this recommendation. | ||
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Jumper setting for MEC15xx EVB Assy 6853 Rev A1p0 | ||
================================================= | ||
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Power-related jumpers. | ||
---------------------- | ||
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Power from +5V power brick connected to barrel connector P11 (5.5mm OD, 2.1mm ID) | ||
JP88 5-6 only | ||
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Power from micro-USB type A/B connector P12. | ||
JP88 7-8 only | ||
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+-------+------+------+------+------+------+------+------+------+------+------+ | ||
| JP22 | JP32 | JP33 | JP37 | JP43 | JP47 | JP54 | JP56 | JP58 | JP64 | JP65 | | ||
+=======+======+======+======+======+======+======+======+======+======+======+ | ||
| 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | | ||
+-------+------+------+------+------+------+------+------+------+------+------+ | ||
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+------+------+------+------+------+------+------+------+------+------+ | ||
| JP72 | JP73 | JP76 | JP79 | JP80 | JP81 | JP82 | JP84 | JP87 | JP89 | | ||
+======+======+======+======+======+======+======+======+======+======+ | ||
| 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | | ||
+------+------+------+------+------+------+------+------+------+------+ | ||
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+------+------+-------+-------+-------+ | ||
| JP90 | JP91 | JP100 | JP101 | JP118 | | ||
+======+======+=======+=======+=======+ | ||
| 1-2 | 1-2 | 1-2 | 1-2 | 2-3 | | ||
+------+------+-------+-------+-------+ | ||
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These jumpers configure VCC Power good, nRESETI and JTAG_STRAP respectively. | ||
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+------------------+-----------+--------------+ | ||
| JP5 | JP4 | JP45 | | ||
| (VCC Power good) | (nRESETI) | (JTAG_STRAP) | | ||
+==================+===========+==============+ | ||
| 1-2 | 1-2 | 2-3 | | ||
+------------------+-----------+--------------+ | ||
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Boot-ROM Straps. | ||
---------------- | ||
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These jumpers configure MEC1501 Boot-ROM straps. | ||
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+-------------+---------- -+--------------+-------------+ | ||
| JP93 | JP11 | JP46 | JP96 | | ||
| (CMP_STRAP) | (CR_STRAP) | (VTR2_STRAP) | (BSS_STRAP) | | ||
+=============+============+==============+=============+ | ||
| 2-3 | 1-2 | 2-3 | 1-2 | | ||
+-------------+------------+--------------+-------------+ | ||
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JP96 1-2 pulls SHD SPI CS0# up to VTR2 | ||
MEC1501 Boot-ROM samples SHD SPI CS0# and if high | ||
loads from SHD SPI. | ||
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Peripheral Routing Jumpers | ||
-------------------------- | ||
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Each column of the following table illustrates how to enable UART0, JTAG, | ||
PVT SPI, SHD SPI and LED0-2 respectively. | ||
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+---------+--------+-----------+----------+---------+ | ||
| JP68 | JP9 | JP38 | JP98 | JP41 | | ||
| (UART0) | (JTAG) | (PVT SPI) | (SHD SPI)| (LED0-2)| | ||
+=========+========+===========+==========+=========+ | ||
| 1-2 | 2-3 | 2-3 | 2-3 | 1-2 | | ||
+---------+--------+-----------+----------+---------+ | ||
| 4-5 | 5-6 | 5-6 | 5-6 | 3-4 | | ||
+---------+--------+-----------+----------+---------+ | ||
| 8-9 | 8-9 | 8-9 | 8-9 | 5-6 | | ||
+---------+--------+-----------+----------+---------+ | ||
| | 11-12 | 11-12 | 11-12 | | | ||
+---------+--------+-----------+----------+---------+ | ||
| | | 14-15 | 14-15 | | | ||
+---------+--------+-----------+----------+---------+ | ||
| | | 17-18 | 20-21 | | | ||
+---------+--------+-----------+----------+---------+ | ||
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Jumper settings for MEC1501 144WFBGA Socket DC Assy 6883 Rev B1p0 | ||
================================================================= | ||
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The jumper configuration explained above covers the base board. The ASSY | ||
6883 MEC1501 CPU board provides capability for an optional, external 32KHz | ||
clock source. The card includes a 32KHz crystal oscillator. The card can | ||
also be configured to use an external 50% duty cycle 32KHz source on the | ||
XTAL2/32KHZ_IN pin. Note, firmware must set the MEC15xx clock enable | ||
register to select the external source matching the jumper settings. If | ||
using the MEC15xx internal silicon oscillator then the 32K jumper settings | ||
are don't cares. JP1 is for scoping test clock outputs. Please refer to | ||
the schematic in reference section below. | ||
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Parallel 32KHz crystal configuration | ||
------------------------------------ | ||
+-------+-------+ | ||
| JP2 | JP3 | | ||
+=======+=======+ | ||
| 1-2 | 2-3 | | ||
+-------+-------+ | ||
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External 32KHz 50% duty cycle configuration | ||
------------------------------------------- | ||
+-------+-------+ | ||
| JP2 | JP3 | | ||
+=======+=======+ | ||
| NC | 1-2 | | ||
+-------+-------+ | ||
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Jumper settings for MEC1503 144WFBGA Socket DC Assy 6856 Rev B1p0 | ||
================================================================= | ||
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The MEC1503 ASSY 6856 CPU card does not include an onboard external | ||
32K crystal or oscillator. The one jumper block JP1 is for scoping | ||
test clock outputs not for configuration. Please refer to schematic | ||
in reference section below. | ||
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Programming and Debugging | ||
************************* | ||
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This board comes with a Cortex ETM port which facilitates tracing and debugging | ||
using a single physical connection. In addition, it comes with sockets for | ||
JTAG only sessions. | ||
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Flashing | ||
======== | ||
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#. Connect the SPI Dongle ASSY 6791 to J36 (SPI dongle) in order to flash and | ||
boot from SHD SPI NOR. Then proceed to flash using Dediprog SF100 or a | ||
similar tool for flashing SPI chips. | ||
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.. note:: Remember that SPI MISO/MOSI are swapped on dediprog headers! | ||
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#. Run your favorite terminal program to listen for output. Under Linux the | ||
terminal should be :code:`/dev/ttyACM0`. For example: | ||
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.. code-block:: console | ||
$ minicom -D /dev/ttyACM0 -o | ||
The -o option tells minicom not to send the modem initialization | ||
string. Connection should be configured as follows: | ||
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- Speed: 115200 | ||
- Data: 8 bits | ||
- Parity: None | ||
- Stop bits: 1 | ||
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#. Connect the MEC15xxEVB_ASSY_6853 board to your host computer using the | ||
UART0 port. Then build :ref: `hello_world` application. It is important | ||
to generate a binary with a new load address, for example do the following:: | ||
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${OBJCOPY} --change-addresses -0xe0000 -O binary -S ${in_elf} ${out_bin} | ||
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Once you obtain the binary, proceed to use the microchip tool mec15xx_spi_gen | ||
in order to create the final binary. This binary is what you need to flash | ||
in your spi nor. | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/hello_world | ||
:board: mec15xxevb_assy6853 | ||
:goals: build flash | ||
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You should see "Hello World! mec15xxevb_assy6853" in your terminal. | ||
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Debugging | ||
========= | ||
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You can debug an application in the usual way. Here is an example for the | ||
:ref:`hello_world` application. | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/hello_world | ||
:board: mec15xxevb_assy6853 | ||
:maybe-skip-config: | ||
:goals: debug | ||
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References | ||
********** | ||
.. target-notes:: | ||
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.. _MEC1501 Preliminary Data Sheet: | ||
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501_Datasheet.pdf | ||
.. _MEC1501 Reference Manual: | ||
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501_Datasheet.pdf | ||
.. _MEC15xx EVB Schematic: | ||
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/Everglades%20EVB%20-%20Assy_6853%20Rev%20A1p1%20-%20SCH.pdf | ||
.. _MEC1501 Daughter Card Schematic: | ||
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501%20Socket%20DC%20for%20EVERGLADES%20EVB%20-%20Assy_6883%20Rev%20A0p1%20-%20SCH.pdf | ||
.. _MEC1503 Daughter Card Schematic: | ||
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1503%20Socket%20DC%20for%20EVERGLADES%20EVB%20-%20Assy_6856%20Rev%20A1p0%20-%20SCH.pdf | ||
.. _SPI Dongle Schematic: | ||
https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/SPI%20Dongles%20and%20Aardvark%20Interposer%20Assy%206791%20Rev%20A1p1%20-%20SCH.pdf |
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/* | ||
* Copyright (c) 2018, Intel Corporation | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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/dts-v1/; | ||
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#include <microchip/mec1501hsz.dtsi> | ||
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/ { | ||
model = "Microchip MEC15XXEVB_ASSY6853 evaluation board"; | ||
compatible = "microchip,mec15xxevb_assy6853", "microchip,mec1501hsz"; | ||
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chosen { | ||
zephyr,sram = &sram0; | ||
zephyr,console = &uart0; | ||
zephyr,flash = &flash0; | ||
}; | ||
}; | ||
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&uart0 { | ||
status = "ok"; | ||
current-speed = <115200>; | ||
}; |
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# | ||
# Copyright (c) 2019, Intel Corporation | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
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identifier: mec15xxevb_assy6853 | ||
name: MEC15XX EVB ASSY 6853 | ||
type: mcu | ||
arch: arm | ||
toolchain: | ||
- zephyr | ||
- gnuarmemb | ||
ram: 32 | ||
flash: 224 |
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boards/arm/mec15xxevb_assy6853/mec15xxevb_assy6853_defconfig
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# | ||
# Copyright (c) 2019, Intel Corporation | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
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CONFIG_ARM=y | ||
CONFIG_SOC_MEC1501_HSZ=y | ||
CONFIG_SOC_SERIES_MEC1501X=y | ||
CONFIG_BOARD_MEC15XXEVB_ASSY6853=y | ||
CONFIG_CORTEX_M_SYSTICK=y | ||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000 | ||
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CONFIG_CONSOLE=y | ||
CONFIG_UART_CONSOLE=y | ||
CONFIG_SERIAL=y |
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