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drivers: flash: stm32l4x: Support SOCs with < 1MB

Up to now, the only SOC that was supported in the STM32L496 series was
STM32L496XG with flash of 1MB. With the recent support of STM32L496XE,
this implementation is not correct. This patch adds support for the
other SOCs that come with flashes of 512KB and 256KB.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
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gon1332 authored and galak committed Jun 26, 2019
1 parent e6fe542 commit 4fffe790be2d2469939a70e5ff22f2e23d175b02
Showing with 16 additions and 2 deletions.
  1. +16 −2 drivers/flash/flash_stm32l4x.c
@@ -1,6 +1,7 @@
/*
* Copyright (c) 2017 Linaro Limited
* Copyright (c) 2017 BayLibre, SAS
* Copyright (c) 2019 Centaur Analytics, Inc
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -114,8 +115,21 @@ static int erase_page(struct device *dev, unsigned int page)
{
struct stm32l4x_flash *regs = FLASH_STM32_REGS(dev);
u32_t tmp;
u16_t pages_per_bank;
int rc;

#if DT_FLASH_SIZE == 1024
/* The SOC has 1MB of FLASH with DUALBANKing by design */
pages_per_bank = 256U;
#elif DT_FLASH_SIZE < 1024
#ifdef FLASH_OPTR_DUALBANK
/* DUALBANKing is used, so find the correct number of pages per bank */
pages_per_bank = DT_FLASH_SIZE >> 2; /* Also there are two banks */
#else
pages_per_bank = DT_FLASH_SIZE >> 1; /* Each page is of 2KB size */
#endif /* FLASH_OPTR_DUALBANK */
#endif

/* if the control register is locked, do not fail silently */
if (regs->cr & FLASH_CR_LOCK) {
return -EIO;
@@ -132,11 +146,11 @@ static int erase_page(struct device *dev, unsigned int page)
#ifdef FLASH_CR_BKER
regs->cr &= ~FLASH_CR_BKER_Msk;
/* Select bank, only for DUALBANK devices */
if (page >= 256U)
if (page >= pages_per_bank)
regs->cr |= FLASH_CR_BKER;
#endif
regs->cr &= ~FLASH_CR_PNB_Msk;
regs->cr |= ((page % 256) << 3);
regs->cr |= ((page % pages_per_bank) << 3);

/* Set the STRT bit */
regs->cr |= FLASH_CR_STRT;

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