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drivers: gpio: stm32: Indentation and cleanup

Cleaning up indentation of stm32 drivers

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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yboutreux authored and galak committed Apr 1, 2019
1 parent aca4b07 commit 524c625579d4d579e636ae26dc934814645d71e6
Showing with 42 additions and 38 deletions.
  1. +28 −28 drivers/gpio/gpio_stm32.c
  2. +14 −10 drivers/gpio/gpio_stm32.h
@@ -94,6 +94,7 @@ int gpio_stm32_configure(u32_t *base_addr, int pin, int conf, int altf)
GPIO_TypeDef *gpio = (GPIO_TypeDef *)base_addr;

int pin_ll = stm32_pinval_get(pin);

#ifdef CONFIG_SOC_SERIES_STM32F1X
ARG_UNUSED(altf);

@@ -179,7 +180,7 @@ int gpio_stm32_configure(u32_t *base_addr, int pin, int conf, int altf)

LL_GPIO_SetPinPull(gpio, pin_ll, pupd >> STM32_PUPDR_SHIFT);

#endif /* CONFIG_SOC_SERIES_STM32F1X */
#endif /* CONFIG_SOC_SERIES_STM32F1X */

return 0;
}
@@ -189,7 +190,7 @@ int gpio_stm32_configure(u32_t *base_addr, int pin, int conf, int altf)
*/
const int gpio_stm32_enable_int(int port, int pin)
{
#if defined(CONFIG_SOC_SERIES_STM32F2X) || \
#if defined(CONFIG_SOC_SERIES_STM32F2X) || \
defined(CONFIG_SOC_SERIES_STM32F3X) || \
defined(CONFIG_SOC_SERIES_STM32F4X) || \
defined(CONFIG_SOC_SERIES_STM32F7X) || \
@@ -282,7 +283,7 @@ static int gpio_stm32_config(struct device *dev, int access_op,

if ((flags & GPIO_INT_DOUBLE_EDGE) != 0) {
edge = STM32_EXTI_TRIG_RISING |
STM32_EXTI_TRIG_FALLING;
STM32_EXTI_TRIG_FALLING;
} else if ((flags & GPIO_INT_ACTIVE_HIGH) != 0) {
edge = STM32_EXTI_TRIG_RISING;
} else {
@@ -411,7 +412,7 @@ static int gpio_stm32_init(struct device *device)
device_get_binding(STM32_CLOCK_CONTROL_NAME);

if (clock_control_on(clk,
(clock_control_subsys_t *) &cfg->pclken) != 0) {
(clock_control_subsys_t *)&cfg->pclken) != 0) {
return -EIO;
}

@@ -427,36 +428,35 @@ static int gpio_stm32_init(struct device *device)
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);
}
}
#endif /* PWR_CR2_IOSV */
#endif /* PWR_CR2_IOSV */

return 0;
}


#define GPIO_DEVICE_INIT(__name, __suffix, __base_addr, __port, __cenr, __bus) \
static const struct gpio_stm32_config gpio_stm32_cfg_## __suffix = { \
.base = (u32_t *)__base_addr, \
.port = __port, \
.pclken = { .bus = __bus, .enr = __cenr } \
}; \
static struct gpio_stm32_data gpio_stm32_data_## __suffix; \
DEVICE_AND_API_INIT(gpio_stm32_## __suffix, \
__name, \
gpio_stm32_init, \
&gpio_stm32_data_## __suffix, \
&gpio_stm32_cfg_## __suffix, \
POST_KERNEL, \
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \
&gpio_stm32_driver);


#define GPIO_DEVICE_INIT_STM32(__suffix, __SUFFIX) \
GPIO_DEVICE_INIT(DT_GPIO_STM32_GPIO##__SUFFIX##_LABEL, \
__suffix, \
DT_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS, \
STM32_PORT##__SUFFIX, \
DT_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BITS, \
DT_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BUS)
static const struct gpio_stm32_config gpio_stm32_cfg_## __suffix = { \
.base = (u32_t *)__base_addr, \
.port = __port, \
.pclken = { .bus = __bus, .enr = __cenr } \
}; \
static struct gpio_stm32_data gpio_stm32_data_## __suffix; \
DEVICE_AND_API_INIT(gpio_stm32_## __suffix, \
__name, \
gpio_stm32_init, \
&gpio_stm32_data_## __suffix, \
&gpio_stm32_cfg_## __suffix, \
POST_KERNEL, \
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \
&gpio_stm32_driver)

#define GPIO_DEVICE_INIT_STM32(__suffix, __SUFFIX) \
GPIO_DEVICE_INIT(DT_GPIO_STM32_GPIO##__SUFFIX##_LABEL, \
__suffix, \
DT_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS, \
STM32_PORT##__SUFFIX, \
DT_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BITS, \
DT_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BUS)

#ifdef CONFIG_GPIO_STM32_PORTA
GPIO_DEVICE_INIT_STM32(a, A);
@@ -123,17 +123,21 @@
#endif /* CONFIG_SOC_SERIES_.. */

#ifdef CONFIG_SOC_SERIES_STM32F1X
#define STM32_PINCFG_MODE_OUTPUT STM32_MODE_OUTPUT | STM32_CNF_GP_OUTPUT | STM32_CNF_PUSH_PULL
#define STM32_PINCFG_MODE_INPUT STM32_MODE_INPUT
#define STM32_PINCFG_PULL_UP STM32_CNF_IN_PUPD | STM32_PUPD_PULL_UP
#define STM32_PINCFG_PULL_DOWN STM32_CNF_IN_PUPD | STM32_PUPD_PULL_DOWN
#define STM32_PINCFG_FLOATING STM32_CNF_IN_FLOAT | STM32_PUPD_NO_PULL
#define STM32_PINCFG_MODE_OUTPUT (STM32_MODE_OUTPUT \
| STM32_CNF_GP_OUTPUT \
| STM32_CNF_PUSH_PULL)
#define STM32_PINCFG_MODE_INPUT STM32_MODE_INPUT
#define STM32_PINCFG_PULL_UP (STM32_CNF_IN_PUPD | STM32_PUPD_PULL_UP)
#define STM32_PINCFG_PULL_DOWN (STM32_CNF_IN_PUPD | \
STM32_PUPD_PULL_DOWN)
#define STM32_PINCFG_FLOATING (STM32_CNF_IN_FLOAT | \
STM32_PUPD_NO_PULL)
#else
#define STM32_PINCFG_MODE_OUTPUT STM32_MODER_OUTPUT_MODE
#define STM32_PINCFG_MODE_INPUT STM32_MODER_INPUT_MODE
#define STM32_PINCFG_PULL_UP STM32_PUPDR_PULL_UP
#define STM32_PINCFG_PULL_DOWN STM32_PUPDR_PULL_DOWN
#define STM32_PINCFG_FLOATING STM32_PUPDR_NO_PULL
#define STM32_PINCFG_MODE_OUTPUT STM32_MODER_OUTPUT_MODE
#define STM32_PINCFG_MODE_INPUT STM32_MODER_INPUT_MODE
#define STM32_PINCFG_PULL_UP STM32_PUPDR_PULL_UP
#define STM32_PINCFG_PULL_DOWN STM32_PUPDR_PULL_DOWN
#define STM32_PINCFG_FLOATING STM32_PUPDR_NO_PULL
#endif /* CONFIG_SOC_SERIES_STM32F1X */

/**

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