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soc/x86/intel_quark: remove support for Quark D2000 SoC

Removed Quark D2000 SoC files and first-order related DT bindings.

A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
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Charles E. Youse authored and nashif committed Jun 21, 2019
1 parent ca49108 commit 57b46bbc85aa0f53c3fd71657977645bc67f3583
@@ -48,7 +48,6 @@
/arch/x86/core/pcie.c @gnuless
/arch/x86/core/multiboot.c @gnuless
/soc/x86/ @andrewboie @wentongwu
/soc/x86/intel_quark/quark_d2000/ @nashif
/soc/x86/intel_quark/quark_se/ @nashif
/soc/x86/intel_quark/quark_x1000/ @nashif
/arch/xtensa/ @andrewboie @dcpleung @andyross
@@ -173,7 +173,7 @@ static int rtc_qmsi_init(struct device *dev)
k_sem_init(RP_GET(dev), 1, UINT_MAX);
}

IRQ_CONNECT(DT_RTC_0_IRQ, CONFIG_RTC_0_IRQ_PRI,
IRQ_CONNECT(DT_RTC_0_IRQ, DT_RTC_0_IRQ_PRI,
qm_rtc_0_isr, NULL, DT_RTC_0_IRQ_FLAGS);

/* Unmask RTC interrupt */
@@ -54,14 +54,6 @@ static qm_flash_region_t flash_region(u32_t addr)
return QM_FLASH_REGION_SYS;
}

#if defined(CONFIG_SOC_QUARK_D2000)
if ((addr >= QM_FLASH_REGION_DATA_0_BASE) &&
(addr < (QM_FLASH_REGION_DATA_0_BASE +
QM_FLASH_REGION_DATA_0_SIZE))) {
return QM_FLASH_REGION_DATA;
}
#endif

/* invalid address */
return QM_FLASH_REGION_NUM;
}
@@ -72,11 +64,6 @@ static u32_t get_page_num(u32_t addr)
case QM_FLASH_REGION_SYS:
return (addr - QM_FLASH_REGION_SYS_0_BASE) >>
QM_FLASH_PAGE_SIZE_BITS;
#if defined(CONFIG_SOC_QUARK_D2000)
case QM_FLASH_REGION_DATA:
return (addr - QM_FLASH_REGION_DATA_0_BASE) >>
QM_FLASH_PAGE_SIZE_BITS;
#endif
default:
/* invalid address */
return 0xffffffff;
@@ -139,11 +126,6 @@ static int flash_qmsi_write(struct device *dev, off_t addr,
case QM_FLASH_REGION_SYS:
offset = f_addr - QM_FLASH_REGION_SYS_0_BASE;
break;
#if defined(CONFIG_SOC_QUARK_D2000)
case QM_FLASH_REGION_DATA:
offset = f_addr - QM_FLASH_REGION_DATA_0_BASE;
break;
#endif
default:
return -EIO;
}
@@ -387,7 +387,7 @@ static int gpio_dw_device_ctrl(struct device *port, u32_t ctrl_command,
#define gpio_dw_set_power_state(...)
#endif

#if defined(CONFIG_SOC_QUARK_SE_C1000) || defined(CONFIG_SOC_QUARK_D2000)
#if defined(CONFIG_SOC_QUARK_SE_C1000)
static inline void gpio_dw_unmask_int(u32_t mask_addr)
{
sys_write32(sys_read32(mask_addr) & INT_UNMASK_IA, mask_addr);
@@ -386,7 +386,7 @@ static int gpio_qmsi_init(struct device *port)
CLK_PERIPH_GPIO_DB |
CLK_PERIPH_CLK);
IRQ_CONNECT(DT_GPIO_QMSI_0_IRQ,
CONFIG_GPIO_QMSI_0_IRQ_PRI, qm_gpio_0_isr, 0,
DT_GPIO_QMSI_0_IRQ_PRI, qm_gpio_0_isr, 0,
DT_GPIO_QMSI_0_IRQ_FLAGS);
irq_enable(DT_GPIO_QMSI_0_IRQ);
QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->gpio_0_int_mask);
@@ -380,7 +380,7 @@ static void irq_config_func_0(struct device *dev)
ARG_UNUSED(dev);

IRQ_CONNECT(DT_UART_QMSI_0_IRQ,
CONFIG_UART_QMSI_0_IRQ_PRI, uart_qmsi_isr,
DT_UART_QMSI_0_IRQ_PRI, uart_qmsi_isr,
DEVICE_GET(uart_0), DT_UART_QMSI_0_IRQ_FLAGS);
irq_enable(DT_UART_QMSI_0_IRQ);
QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->uart_0_int_mask);
@@ -393,7 +393,7 @@ static void irq_config_func_1(struct device *dev)
ARG_UNUSED(dev);

IRQ_CONNECT(DT_UART_QMSI_1_IRQ,
CONFIG_UART_QMSI_1_IRQ_PRI, uart_qmsi_isr,
DT_UART_QMSI_1_IRQ_PRI, uart_qmsi_isr,
DEVICE_GET(uart_1), DT_UART_QMSI_1_IRQ_FLAGS);
irq_enable(DT_UART_QMSI_1_IRQ);
QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->uart_1_int_mask);

This file was deleted.

@@ -23,7 +23,7 @@
#elif CONFIG_SOC_STM32F103XB
#define PWM_DRIVER DT_PWM_STM32_1_DEV_NAME
#define PWM_CHANNEL 1
#elif defined(CONFIG_SOC_QUARK_SE_C1000) || defined(CONFIG_SOC_QUARK_D2000)
#elif defined(CONFIG_SOC_QUARK_SE_C1000)
#define PWM_DRIVER CONFIG_PWM_QMSI_DEV_NAME
#define PWM_CHANNEL 0
#elif defined(CONFIG_SOC_FAMILY_NRF)
@@ -21,7 +21,7 @@
#elif CONFIG_SOC_STM32F103XB
#define PWM_DRIVER DT_PWM_STM32_1_DEV_NAME
#define PWM_CHANNEL 1
#elif defined(CONFIG_SOC_QUARK_SE_C1000) || defined(CONFIG_SOC_QUARK_D2000)
#elif defined(CONFIG_SOC_QUARK_SE_C1000)
#define PWM_DRIVER CONFIG_PWM_QMSI_DEV_NAME
#define PWM_CHANNEL 0
#elif defined(CONFIG_SOC_FAMILY_NRF)
@@ -15,7 +15,7 @@
#include <device.h>
#include <pwm.h>

#if defined(CONFIG_SOC_QUARK_SE_C1000) || defined(CONFIG_SOC_QUARK_D2000)
#if defined(CONFIG_SOC_QUARK_SE_C1000)
#define PWM_DEV CONFIG_PWM_QMSI_DEV_NAME
#elif defined(CONFIG_SOC_FAMILY_NRF)
#if defined(CONFIG_PWM_NRF5_SW)
@@ -5,12 +5,12 @@
#define DT_UART_QMSI_0_BAUDRATE DT_INTEL_QMSI_UART_B0002000_CURRENT_SPEED
#define DT_UART_QMSI_0_NAME DT_INTEL_QMSI_UART_B0002000_LABEL
#define DT_UART_QMSI_0_IRQ DT_INTEL_QMSI_UART_B0002000_IRQ_0
#define CONFIG_UART_QMSI_0_IRQ_PRI DT_INTEL_QMSI_UART_B0002000_IRQ_0_PRIORITY
#define DT_UART_QMSI_0_IRQ_PRI DT_INTEL_QMSI_UART_B0002000_IRQ_0_PRIORITY

#define DT_UART_QMSI_1_BAUDRATE DT_INTEL_QMSI_UART_B0002400_CURRENT_SPEED
#define DT_UART_QMSI_1_NAME DT_INTEL_QMSI_UART_B0002400_LABEL
#define DT_UART_QMSI_1_IRQ DT_INTEL_QMSI_UART_B0002400_IRQ_0
#define CONFIG_UART_QMSI_1_IRQ_PRI DT_INTEL_QMSI_UART_B0002400_IRQ_0_PRIORITY
#define DT_UART_QMSI_1_IRQ_PRI DT_INTEL_QMSI_UART_B0002400_IRQ_0_PRIORITY

#define SRAM_START CONFIG_SRAM_BASE_ADDRESS
#define SRAM_SIZE CONFIG_SRAM_SIZE
@@ -53,7 +53,7 @@

#define DT_RTC_0_NAME DT_INTEL_QMSI_RTC_B0000400_LABEL
#define DT_RTC_0_IRQ DT_INTEL_QMSI_RTC_B0000400_IRQ_0
#define CONFIG_RTC_0_IRQ_PRI DT_INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY
#define DT_RTC_0_IRQ_PRI DT_INTEL_QMSI_RTC_B0000400_IRQ_0_PRIORITY

#define DT_GPIO_QMSI_SS_0_NAME DT_INTEL_QMSI_SS_GPIO_80017800_LABEL
#define DT_GPIO_QMSI_SS_0_IRQ DT_INTEL_QMSI_SS_GPIO_80017800_IRQ_0
@@ -65,7 +65,7 @@

#define DT_GPIO_QMSI_0_NAME DT_INTEL_QMSI_GPIO_B0000C00_LABEL
#define DT_GPIO_QMSI_0_IRQ DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0
#define CONFIG_GPIO_QMSI_0_IRQ_PRI DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0_PRIORITY
#define DT_GPIO_QMSI_0_IRQ_PRI DT_INTEL_QMSI_GPIO_B0000C00_IRQ_0_PRIORITY
#define DT_GPIO_QMSI_1_NAME DT_INTEL_QMSI_GPIO_B0800B00_LABEL
#define DT_GPIO_QMSI_1_IRQ DT_INTEL_QMSI_GPIO_B0800B00_IRQ_0
#define DT_GPIO_QMSI_1_IRQ_PRI DT_INTEL_QMSI_GPIO_B0800B00_IRQ_0_PRIORITY

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