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scripts: mpu align for ro section of new memory region on non-XIP system

on non-XIP system, SRAM is the default region, and relocated .data
section and .bss section of SRAM shouldn't be inserted between
_image_rom_start and _image_rom_end, because the memory region between
_image_rom_start and _image_rom_end will construct the mpu ro region.
Also for the newly added memory region on non-XIP system, the
relocated .text secition and .rodata section should also be mpu aligned.

Fixes: #16090.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
  • Loading branch information...
wentongwu authored and nashif committed May 13, 2019
1 parent 1becd75 commit 743a184b2d5333584d20addf82b2d6e3c4203932
@@ -4,6 +4,10 @@

macro(toolchain_ld_relocation)
set(MEM_RELOCATAION_LD "${PROJECT_BINARY_DIR}/include/generated/linker_relocate.ld")
set(MEM_RELOCATAION_SRAM_DATA_LD
"${PROJECT_BINARY_DIR}/include/generated/linker_sram_data_relocate.ld")
set(MEM_RELOCATAION_SRAM_BSS_LD
"${PROJECT_BINARY_DIR}/include/generated/linker_sram_bss_relocate.ld")
set(MEM_RELOCATAION_CODE "${PROJECT_BINARY_DIR}/code_relocation.c")

add_custom_command(
@@ -15,6 +19,8 @@ macro(toolchain_ld_relocation)
-d ${APPLICATION_BINARY_DIR}
-i '$<TARGET_PROPERTY:code_data_relocation_target,COMPILE_DEFINITIONS>'
-o ${MEM_RELOCATAION_LD}
-s ${MEM_RELOCATAION_SRAM_DATA_LD}
-b ${MEM_RELOCATAION_SRAM_BSS_LD}
-c ${MEM_RELOCATAION_CODE}
DEPENDS app kernel ${ZEPHYR_LIBS_PROPERTY}
)
@@ -354,6 +354,10 @@ SECTIONS
*(COMMON)
*(".kernel_bss.*")

#ifdef CONFIG_CODE_DATA_RELOCATION
#include <linker_sram_bss_relocate.ld>
#endif

/*
* As memory is cleared in words only, it is simpler to ensure the BSS
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
@@ -399,6 +403,10 @@ SECTIONS
#ifdef CONFIG_CUSTOM_RWDATA_LD
/* Located in project source directory */
#include <custom-rwdata.ld>
#endif

#ifdef CONFIG_CODE_DATA_RELOCATION
#include <linker_sram_data_relocate.ld>
#endif

} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
@@ -29,6 +29,7 @@
#define _SRAM2_DATA_SECTION_NAME .sram2_data
#define _SRAM2_BSS_SECTION_NAME .sram2_bss
#define _SRAM2_TEXT_SECTION_NAME .sram2_text
#define SRAM2_ADDR (CONFIG_SRAM_BASE_ADDRESS + RAM_SIZE2)
#endif

#define RAM_SIZE2 (CONFIG_SRAM_SIZE * 512)
@@ -42,6 +42,19 @@
LOAD_ADDRESS_LOCATION_FLASH = "GROUP_DATA_LINK_IN({0}, FLASH)"
LOAD_ADDRESS_LOCATION_BSS = "GROUP_LINK_IN({0})"

MPU_RO_REGION_START = """
_{0}_mpu_ro_region_start = {1}_ADDR;
"""

MPU_RO_REGION_END = """
MPU_ALIGN(_{0}_mpu_ro_region_end - _{0}_mpu_ro_region_start);
_{0}_mpu_ro_region_end = .;
"""

# generic section creation format
LINKER_SECTION_SEQ = """
@@ -193,31 +206,60 @@ def string_create_helper(region, memory_type,
# Create a complete list of funcs/ variables that goes in for this
# memory type
tmp = print_linker_sections(full_list_of_sections[region])
linker_string += LINKER_SECTION_SEQ.format(memory_type.lower(), region,
if memory_type == 'SRAM' and (region == 'data' or region == 'bss'):
linker_string += tmp
else:
linker_string += LINKER_SECTION_SEQ.format(memory_type.lower(), region,
memory_type.upper(), region.upper(),
tmp, load_address_string)

if load_address_in_flash:
linker_string += SECTION_LOAD_MEMORY_SEQ.format(memory_type.lower(),
if load_address_in_flash:
linker_string += SECTION_LOAD_MEMORY_SEQ.format(memory_type.lower(),
region,
memory_type.upper(),
region.upper())

return linker_string


def generate_linker_script(linker_file, complete_list_of_sections):
def generate_linker_script(linker_file, sram_data_linker_file,
sram_bss_linker_file, complete_list_of_sections):
gen_string = ''
gen_string_sram_data = ''
gen_string_sram_bss = ''
for memory_type, full_list_of_sections in complete_list_of_sections.items():
gen_string += string_create_helper("text", memory_type, full_list_of_sections, 1)
gen_string += string_create_helper("rodata", memory_type, full_list_of_sections, 1)
gen_string += string_create_helper("data", memory_type, full_list_of_sections, 1)
gen_string += string_create_helper("bss", memory_type, full_list_of_sections, 0)

if memory_type != "SRAM":
gen_string += MPU_RO_REGION_START.format(memory_type.lower(),
memory_type.upper())
gen_string += string_create_helper("text",
memory_type, full_list_of_sections, 1)
gen_string += string_create_helper("rodata",
memory_type, full_list_of_sections, 1)
if memory_type != "SRAM":
gen_string += MPU_RO_REGION_END.format(memory_type.lower())

if memory_type == 'SRAM':
gen_string_sram_data += string_create_helper("data",
memory_type, full_list_of_sections, 1)
gen_string_sram_bss += string_create_helper("bss",
memory_type, full_list_of_sections, 0)
else:
gen_string += string_create_helper("data",
memory_type, full_list_of_sections, 1)
gen_string += string_create_helper("bss",
memory_type, full_list_of_sections, 0)

#finally writting to the linker file
with open(linker_file, "a+") as file_desc:
file_desc.write(gen_string)

with open(sram_data_linker_file, "a+") as file_desc:
file_desc.write(gen_string_sram_data)

with open(sram_bss_linker_file, "a+") as file_desc:
file_desc.write(gen_string_sram_bss)

def generate_memcpy_code(memory_type, full_list_of_sections, code_generation):

all_sections = True
@@ -237,13 +279,16 @@ def generate_memcpy_code(memory_type, full_list_of_sections, code_generation):

#add all the regions that needs to be copied on boot up
for mtype in ["text", "rodata", "data"]:
if memory_type == "SRAM" and mtype == "data":
continue

if full_list_of_sections[mtype] and generate_section[mtype]:
code_generation["copy_code"] += MEMCPY_TEMPLATE.format(memory_type.lower(), mtype)
code_generation["extern"] += EXTERN_LINKER_VAR_DECLARATION.format(
memory_type.lower(), mtype)

# add for all the bss data that needs to be zeored on boot up
if full_list_of_sections["bss"] and generate_section["bss"]:
if full_list_of_sections["bss"] and generate_section["bss"] and memory_type != "SRAM":
code_generation["zero_code"] += MEMSET_TEMPLATE.format(memory_type.lower())
code_generation["extern"] += EXTERN_LINKER_VAR_DECLARATION.format(
memory_type.lower(), "bss")
@@ -281,6 +326,10 @@ def parse_args():
parser.add_argument("-i", "--input_rel_dict", required=True,
help="input src:memory type(sram2 or ccm or aon etc) string")
parser.add_argument("-o", "--output", required=False, help="Output ld file")
parser.add_argument("-s", "--output_sram_data", required=False,
help="Output sram data ld file")
parser.add_argument("-b", "--output_sram_bss", required=False,
help="Output sram bss ld file")
parser.add_argument("-c", "--output_code", required=False,
help="Output relocation code header file")
parser.add_argument("-v", "--verbose", action="count", default=0,
@@ -330,6 +379,8 @@ def main():
parse_args()
searchpath = args.directory
linker_file = args.output
sram_data_linker_file = args.output_sram_data
sram_bss_linker_file = args.output_sram_bss
rel_dict = create_dict_wrt_mem()
complete_list_of_sections = {}

@@ -354,7 +405,8 @@ def main():
full_list_of_sections,
complete_list_of_sections)

generate_linker_script(linker_file, complete_list_of_sections)
generate_linker_script(linker_file, sram_data_linker_file,
sram_bss_linker_file, complete_list_of_sections)
for mem_type, list_of_sections in complete_list_of_sections.items():
code_generation = generate_memcpy_code(mem_type,
list_of_sections, code_generation)

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