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dts: Add base interrupt-controller to dts bindings

Introduce a intc.yaml that interrupt controller bindings should inherit
from.  intc.yaml defines the properties "interrupt-controller" and
"#interrupt-cells" which all interrupt controllers should have.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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galak committed Aug 9, 2019
1 parent b563f44 commit 786ecf629b2092a9e5c07b5f9a79234cd0466836
@@ -4,7 +4,7 @@ description: >
This binding describes the ARMv6-M Nested Vectored Interrupt Controller.
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -4,7 +4,7 @@ description: >
This binding describes the ARMv7-M Nested Vectored Interrupt Controller.
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -4,7 +4,7 @@ description: >
This binding describes the ARMv8-M Nested Vectored Interrupt Controller.
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -5,7 +5,7 @@ description: >
controller
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -0,0 +1,20 @@
#
# Copyright (c) 2019, Linaro Limited
#
# SPDX-License-Identifier: Apache-2.0
#

title: Interrupt Controller Base Structure

description: >
This binding gives the base structure for all Interrupt Controller devices
properties:
"interrupt-controller":
type: boolean
category: required
description: Convey's this node is an interrupt controller
"#interrupt-cells":
type: int
category: required
description: Number of items to expect in an interrupt specifier
@@ -11,7 +11,7 @@ description: >
This binding describes the RV32M1 Event Unit
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -10,7 +10,7 @@ description: >
This binding describes the RV32M1 INTMUX IP
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -10,7 +10,7 @@ description: >
This binding describes the RISC-V CPU Interrupt Controller
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -10,7 +10,7 @@ description: >
This binding describes the RISC-V Platform-Local Interrupt Controller
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
reg:
@@ -4,7 +4,7 @@ description: >
This binding describes Shared IRQ interrupt dispatcher
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -10,7 +10,7 @@ description: >
This binding describes the ARCV2 IRQ controller
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -4,7 +4,7 @@ description: >
This binding describes DesignWare Programmable Interrupt controller
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -10,7 +10,7 @@ description: >
This binding describes LiteX VexRiscV Interrupt Controller
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:
@@ -4,7 +4,7 @@ description: >
This binding describes Xtensa Core Interrupt controller
inherits:
!include base.yaml
!include [interrupt-controller.yaml, base.yaml]

properties:
compatible:

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