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arch: arc: add handling for accl regs, r25, r30

* when fpu is configured or mpy_option > 6,
accl regs (r58, r59) will be configured,
they are used by fpu and mac, and are caller
-saved scratch regs, so need to be saved before
jumping to interrupt handlers

* r25 and r30 are also caller-saved scratch reg.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
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vonhust authored and andrewboie committed Jul 30, 2019
1 parent a7845b1 commit 908f9ec8f546cedcc053a807e7cce64511cb9099
Showing with 41 additions and 5 deletions.
  1. +8 −0 arch/arc/Kconfig
  2. +18 −0 arch/arc/core/isr_wrapper.S
  3. +5 −1 arch/arc/include/kernel_arch_data.h
  4. +10 −4 arch/arc/include/swap_macros.h
@@ -175,6 +175,14 @@ config ARC_HAS_SECURE
help
This option is enabled when ARC core supports secure mode

config ARC_HAS_ACCL_REGS
bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
default y if FLOAT
help
Depending on the configuration, CPU can contain accumulator reg-pair
(also referred to as r58:r59). These can also be used by gcc as GPR so
kernel needs to save/restore per process

menu "ARC MPU Options"
depends on CPU_HAS_MPU

@@ -291,6 +291,16 @@ _skip_sys_power_save_idle_exit:
SECTION_FUNC(TEXT, _isr_demux)
push_s r3

/* according to ARCv2 ISA, r25, r30, r58, r59 are caller-saved
* scratch registers, possibly used by interrupt handlers
*/
push r25
push r30
#ifdef CONFIG_ARC_HAS_ACCL_REGS
push r58
push r59
#endif

#ifdef CONFIG_EXECUTION_BENCHMARKING
bl read_timer_start_of_isr
#endif
@@ -322,6 +332,14 @@ irq_hint_handled:
jl_s.d [r1]
ld_s r0, [r0] /* delay slot: ISR parameter into r0 */

#ifdef CONFIG_ARC_HAS_ACCL_REGS
pop r59
pop r58
#endif

pop r30
pop r25

/* back from ISR, jump to exit stub */
pop_s r3
j_s [r3]
@@ -141,9 +141,13 @@ struct _callee_saved_stack {
/* r28 is the stack pointer and saved separately */
/* r29 is ILINK and does not need to be saved */
u32_t r30;
#ifdef CONFIG_FP_SHARING

#ifdef CONFIG_ARC_HAS_ACCL_REGS
u32_t r58;
u32_t r59;
#endif

#ifdef CONFIG_FP_SHARING
u32_t fpu_status;
u32_t fpu_ctrl;
#ifdef CONFIG_FP_FPU_DA
@@ -55,12 +55,15 @@ extern "C" {
#endif
st r30, [sp, ___callee_saved_stack_t_r30_OFFSET]

#ifdef CONFIG_ARC_HAS_ACCL_REGS
st r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
st r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
#endif

#ifdef CONFIG_FP_SHARING
ld r13, [r2, ___thread_base_t_user_options_OFFSET]
/* K_FP_REGS is bit 1 */
bbit0 r13, 1, 1f
st r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
st r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
lr r13, [_ARC_V2_FPU_STATUS]
st_s r13, [sp, ___callee_saved_stack_t_fpu_status_OFFSET]
lr r13, [_ARC_V2_FPU_CTRL]
@@ -88,12 +91,15 @@ extern "C" {
/* restore stack pointer from struct k_thread */
ld sp, [r2, _thread_offset_to_sp]

#ifdef CONFIG_ARC_HAS_ACCL_REGS
ld r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
ld r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
#endif

#ifdef CONFIG_FP_SHARING
ld r13, [r2, ___thread_base_t_user_options_OFFSET]
/* K_FP_REGS is bit 1 */
bbit0 r13, 1, 2f
ld r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
ld r59, [sp, ___callee_saved_stack_t_r59_OFFSET]

ld_s r13, [sp, ___callee_saved_stack_t_fpu_status_OFFSET]
sr r13, [_ARC_V2_FPU_STATUS]

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