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dts: Rename DT_.*_GPIO_* to DT_.*_GPIOS_*

Convert DT_.*_GPIO_{CONTROLLER,PIN,FLAGS} ->
	DT_.*_GPIOS_{CONTROLLER,PIN,FLAGS)

Used the following commands to make these conversions:

git grep -l DT_.*_GPIO_CONTROLLER | xargs sed -i 's/DT_\(.*\)_GPIO_CONTROLLER/DT_\1_GPIOS_CONTROLLER/g'
git grep -l DT_.*_GPIO_PIN | xargs sed -i 's/DT_\(.*\)_GPIO_PIN/DT_\1_GPIOS_PIN/g'
git grep -l DT_.*_GPIO_FLAGS | xargs sed -i 's/DT_\(.*\)_GPIO_FLAGS/DT_\1_GPIOS_FLAGS/g'

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
  • Loading branch information...
galak committed Jun 22, 2019
1 parent 0eee0a3 commit a614a026b7a5aa20cdf01cd3ef6a054b9dd72f91
@@ -402,17 +402,17 @@ the format specified by the YAML bindings. For example:
#define DT_GPIO_KEYS_0 1
/* button_0 */
#define DT_GPIO_KEYS_BUTTON_0_GPIO_CONTROLLER "GPIO_2"
#define DT_GPIO_KEYS_BUTTON_0_GPIO_FLAGS 0
#define DT_GPIO_KEYS_BUTTON_0_GPIO_PIN 6
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER "GPIO_2"
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS 0
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN 6
#define DT_GPIO_KEYS_BUTTON_0_LABEL "User SW2"
#define DT_GPIO_KEYS_SW1_GPIO_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIO_CONTROLLER
#define DT_GPIO_KEYS_SW1_GPIO_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIO_FLAGS
#define DT_GPIO_KEYS_SW1_GPIO_PIN DT_GPIO_KEYS_BUTTON_0_GPIO_PIN
#define DT_GPIO_KEYS_SW1_GPIOS_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW1_GPIOS_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW1_GPIOS_PIN DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define DT_GPIO_KEYS_SW1_LABEL DT_GPIO_KEYS_BUTTON_0_LABEL
#define SW1_GPIO_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIO_CONTROLLER
#define SW1_GPIO_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIO_FLAGS
#define SW1_GPIO_PIN DT_GPIO_KEYS_BUTTON_0_GPIO_PIN
#define SW1_GPIO_CONTROLLER DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define SW1_GPIO_FLAGS DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define SW1_GPIO_PIN DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define SW1_LABEL DT_GPIO_KEYS_BUTTON_0_LABEL
Additionally, a file named ``generated_dts_board_fixups.h`` is
@@ -45,11 +45,11 @@
#define CMD_OGF 1
#define CMD_OCF 2

#define GPIO_IRQ_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIO_PIN
#define GPIO_RESET_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIO_PIN
#ifdef DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_PIN
#define GPIO_CS_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_PIN
#endif /* DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_PIN */
#define GPIO_IRQ_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIOS_PIN
#define GPIO_RESET_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIOS_PIN
#ifdef DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_PIN
#define GPIO_CS_PIN DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_PIN
#endif /* DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_PIN */

/* Max SPI buffer length for transceive operations.
*
@@ -194,10 +194,10 @@ static void bt_spi_handle_vendor_evt(u8_t *rxmsg)
*/
static int configure_cs(void)
{
cs_dev = device_get_binding(DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
cs_dev = device_get_binding(DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
if (!cs_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
return -EIO;
}

@@ -254,10 +254,10 @@ static int configure_cs(void)

spi_conf_cs.gpio_pin = GPIO_CS_PIN,
spi_conf_cs.gpio_dev = device_get_binding(
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
if (!spi_conf_cs.gpio_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_CS_GPIOS_CONTROLLER);
return -EIO;
}

@@ -545,18 +545,18 @@ static int bt_spi_init(struct device *unused)
}

irq_dev = device_get_binding(
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIOS_CONTROLLER);
if (!irq_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_IRQ_GPIOS_CONTROLLER);
return -EIO;
}

rst_dev = device_get_binding(
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIOS_CONTROLLER);
if (!rst_dev) {
BT_ERR("Failed to initialize GPIO driver: %s",
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIO_CONTROLLER);
DT_INST_0_ZEPHYR_BT_HCI_SPI_RESET_GPIOS_CONTROLLER);
return -EIO;
}

@@ -531,7 +531,7 @@ static int mcp2515_init(struct device *dev)
return -EINVAL;
}

#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN
dev_data->spi_cs_ctrl.gpio_dev =
device_get_binding(dev_cfg->spi_cs_port);
if (!dev_data->spi_cs_ctrl.gpio_dev) {
@@ -545,7 +545,7 @@ static int mcp2515_init(struct device *dev)
dev_data->spi_cfg.cs = &dev_data->spi_cs_ctrl;
#else
dev_data->spi_cfg.cs = NULL;
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN */
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN */

/* Reset MCP2515 */
if (mcp2515_cmd_soft_reset(dev)) {
@@ -614,10 +614,10 @@ static const struct mcp2515_config mcp2515_config_1 = {
.int_port = DT_INST_0_MICROCHIP_MCP2515_INT_GPIOS_CONTROLLER,
.int_thread_stack_size = CONFIG_CAN_MCP2515_INT_THREAD_STACK_SIZE,
.int_thread_priority = CONFIG_CAN_MCP2515_INT_THREAD_PRIO,
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN
.spi_cs_pin = DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN,
.spi_cs_port = DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_CONTROLLER,
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN */
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN
.spi_cs_pin = DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN,
.spi_cs_port = DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_CONTROLLER,
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN */
.tq_sjw = CONFIG_CAN_SJW,
.tq_prop = CONFIG_CAN_PROP_SEG,
.tq_bs1 = CONFIG_CAN_PHASE_SEG1,
@@ -27,9 +27,9 @@ struct mcp2515_data {
/* spi device data */
struct device *spi;
struct spi_config spi_cfg;
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN
#ifdef DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN
struct spi_cs_control spi_cs_ctrl;
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIO_PIN */
#endif /* DT_INST_0_MICROCHIP_MCP2515_CS_GPIOS_PIN */

/* interrupt data */
struct device *int_gpio;
@@ -24,7 +24,7 @@ struct ili9340_data {
struct device *command_data_gpio;
struct device *spi_dev;
struct spi_config spi_config;
#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIOS_CONTROLLER
struct spi_cs_control cs_ctrl;
#endif
};
@@ -61,10 +61,10 @@ static int ili9340_init(struct device *dev)
data->spi_config.operation = SPI_OP_MODE_MASTER | SPI_WORD_SET(8);
data->spi_config.slave = DT_INST_0_ILITEK_ILI9340_BASE_ADDRESS;

#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_ILITEK_ILI9340_CS_GPIOS_CONTROLLER
data->cs_ctrl.gpio_dev =
device_get_binding(DT_INST_0_ILITEK_ILI9340_CS_GPIO_CONTROLLER);
data->cs_ctrl.gpio_pin = DT_INST_0_ILITEK_ILI9340_CS_GPIO_PIN;
device_get_binding(DT_INST_0_ILITEK_ILI9340_CS_GPIOS_CONTROLLER);
data->cs_ctrl.gpio_pin = DT_INST_0_ILITEK_ILI9340_CS_GPIOS_PIN;
data->cs_ctrl.delay = 0U;
data->spi_config.cs = &(data->cs_ctrl);
#else
@@ -39,7 +39,7 @@ struct ssd1673_data {
struct device *busy;
struct device *spi_dev;
struct spi_config spi_config;
#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_CONTROLLER)
struct spi_cs_control cs_ctrl;
#endif
u8_t scan_mode;
@@ -620,15 +620,15 @@ static int ssd1673_init(struct device *dev)
gpio_pin_configure(driver->busy, DT_INST_0_SOLOMON_SSD1673FB_BUSY_GPIOS_PIN,
GPIO_DIR_IN);

#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_CONTROLLER)
driver->cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_CONTROLLER);
DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_CONTROLLER);
if (!driver->cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get SPI GPIO CS device");
return -EIO;
}

driver->cs_ctrl.gpio_pin = DT_INST_0_SOLOMON_SSD1673FB_CS_GPIO_PIN;
driver->cs_ctrl.gpio_pin = DT_INST_0_SOLOMON_SSD1673FB_CS_GPIOS_PIN;
driver->cs_ctrl.delay = 0U;
driver->spi_config.cs = &driver->cs_ctrl;
#endif
@@ -764,8 +764,8 @@ static const struct eth_enc28j60_config eth_enc28j60_0_config = {
.spi_freq = DT_INST_0_MICROCHIP_ENC28J60_SPI_MAX_FREQUENCY,
.spi_slave = DT_INST_0_MICROCHIP_ENC28J60_BASE_ADDRESS,
#ifdef CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS
.spi_cs_port = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIO_CONTROLLER,
.spi_cs_pin = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIO_PIN,
.spi_cs_port = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIOS_CONTROLLER,
.spi_cs_pin = DT_INST_0_MICROCHIP_ENC28J60_CS_GPIOS_PIN,
#endif /* CONFIG_ETH_ENC28J60_0_GPIO_SPI_CS */
.full_duplex = IS_ENABLED(CONFIG_ETH_ENC28J60_0_FULL_DUPLEX),
.timeout = CONFIG_ETH_ENC28J60_TIMEOUT,
@@ -412,12 +412,12 @@ static int spi_flash_wb_configure(struct device *dev)

#if defined(CONFIG_SPI_FLASH_W25QXXDV_GPIO_SPI_CS)
data->cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_WINBOND_W25Q16_CS_GPIO_CONTROLLER);
DT_INST_0_WINBOND_W25Q16_CS_GPIOS_CONTROLLER);
if (!data->cs_ctrl.gpio_dev) {
return -ENODEV;
}

data->cs_ctrl.gpio_pin = DT_INST_0_WINBOND_W25Q16_CS_GPIO_PIN;
data->cs_ctrl.gpio_pin = DT_INST_0_WINBOND_W25Q16_CS_GPIOS_PIN;
data->cs_ctrl.delay = CONFIG_SPI_FLASH_W25QXXDV_GPIO_CS_WAIT_DELAY;

data->spi_cfg.cs = &data->cs_ctrl;
@@ -47,9 +47,9 @@
struct spi_nor_data {
struct device *spi;
struct spi_config spi_cfg;
#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER
struct spi_cs_control cs_ctrl;
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER */
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER */
struct k_sem sem;
};

@@ -348,18 +348,18 @@ static int spi_nor_configure(struct device *dev)
data->spi_cfg.operation = SPI_WORD_SET(8);
data->spi_cfg.slave = DT_INST_0_JEDEC_SPI_NOR_BASE_ADDRESS;

#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER
#ifdef DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER
data->cs_ctrl.gpio_dev =
device_get_binding(DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER);
device_get_binding(DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER);
if (!data->cs_ctrl.gpio_dev) {
return -ENODEV;
}

data->cs_ctrl.gpio_pin = DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_PIN;
data->cs_ctrl.gpio_pin = DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_PIN;
data->cs_ctrl.delay = CONFIG_SPI_NOR_CS_WAIT_DELAY;

data->spi_cfg.cs = &data->cs_ctrl;
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIO_CONTROLLER */
#endif /* DT_INST_0_JEDEC_SPI_NOR_CS_GPIOS_CONTROLLER */

/* now the spi bus is configured, we can verify the flash id */
if (spi_nor_read_id(dev, params) != 0) {
@@ -985,20 +985,20 @@ static inline int configure_spi(struct device *dev)

#if defined(CONFIG_IEEE802154_CC2520_GPIO_SPI_CS)
cs_ctrl.gpio_dev = device_get_binding(
DT_INST_0_TI_CC2520_CS_GPIO_CONTROLLER);
DT_INST_0_TI_CC2520_CS_GPIOS_CONTROLLER);
if (!cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}

cs_ctrl.gpio_pin = DT_INST_0_TI_CC2520_CS_GPIO_PIN;
cs_ctrl.gpio_pin = DT_INST_0_TI_CC2520_CS_GPIOS_PIN;
cs_ctrl.delay = 0U;

cc2520->spi_cfg.cs = &cs_ctrl;

LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_INST_0_TI_CC2520_CS_GPIO_CONTROLLER,
DT_INST_0_TI_CC2520_CS_GPIO_PIN);
DT_INST_0_TI_CC2520_CS_GPIOS_CONTROLLER,
DT_INST_0_TI_CC2520_CS_GPIOS_PIN);
#endif /* CONFIG_IEEE802154_CC2520_GPIO_SPI_CS */

cc2520->spi_cfg.frequency = DT_INST_0_TI_CC2520_SPI_MAX_FREQUENCY;
@@ -1378,23 +1378,23 @@ static inline int configure_spi(struct device *dev)
return -ENODEV;
}

#if defined(DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER)
#if defined(DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER)
mcr20a->cs_ctrl.gpio_dev = device_get_binding(
DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER);
DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER);
if (!mcr20a->cs_ctrl.gpio_dev) {
LOG_ERR("Unable to get GPIO SPI CS device");
return -ENODEV;
}

mcr20a->cs_ctrl.gpio_pin = DT_NXP_MCR20A_0_CS_GPIO_PIN;
mcr20a->cs_ctrl.gpio_pin = DT_NXP_MCR20A_0_CS_GPIOS_PIN;
mcr20a->cs_ctrl.delay = 0U;

mcr20a->spi_cfg.cs = &mcr20a->cs_ctrl;

LOG_DBG("SPI GPIO CS configured on %s:%u",
DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER,
DT_NXP_MCR20A_0_CS_GPIO_PIN);
#endif /* DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER */
DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER,
DT_NXP_MCR20A_0_CS_GPIOS_PIN);
#endif /* DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER */

mcr20a->spi_cfg.frequency = DT_INST_0_NXP_MCR20A_SPI_MAX_FREQUENCY;
mcr20a->spi_cfg.operation = SPI_WORD_SET(8);
@@ -25,7 +25,7 @@ struct mcr20a_context {
struct gpio_callback irqb_cb;
struct device *spi;
struct spi_config spi_cfg;
#if defined(DT_NXP_MCR20A_0_CS_GPIO_CONTROLLER)
#if defined(DT_NXP_MCR20A_0_CS_GPIOS_CONTROLLER)
struct spi_cs_control cs_ctrl;
#endif
u8_t mac_addr[8];
@@ -734,7 +734,7 @@ static int adxl362_init(struct device *dev)
data->spi_cfg.frequency = config->spi_max_frequency;
data->spi_cfg.slave = config->spi_slave;

#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
data->adxl362_cs_ctrl.gpio_dev =
device_get_binding(config->gpio_cs_port);
if (!data->adxl362_cs_ctrl.gpio_dev) {
@@ -788,9 +788,9 @@ static const struct adxl362_config adxl362_config = {
.spi_name = DT_INST_0_ADI_ADXL362_BUS_NAME,
.spi_slave = DT_INST_0_ADI_ADXL362_BASE_ADDRESS,
.spi_max_frequency = DT_INST_0_ADI_ADXL362_SPI_MAX_FREQUENCY,
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
.gpio_cs_port = DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL362_CS_GPIO_PIN,
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
.gpio_cs_port = DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL362_CS_GPIOS_PIN,
#endif
#if defined(CONFIG_ADXL362_TRIGGER)
.gpio_port = DT_INST_0_ADI_ADXL362_INT1_GPIOS_CONTROLLER,
@@ -174,7 +174,7 @@ struct adxl362_config {
char *spi_name;
u32_t spi_max_frequency;
u16_t spi_slave;
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
const char *gpio_cs_port;
u8_t cs_gpio;
#endif
@@ -189,7 +189,7 @@ struct adxl362_config {
struct adxl362_data {
struct device *spi;
struct spi_config spi_cfg;
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL362_CS_GPIOS_CONTROLLER)
struct spi_cs_control adxl362_cs_ctrl;
#endif
s16_t acc_x;
@@ -898,7 +898,7 @@ static int adxl372_init(struct device *dev)
data->spi_cfg.frequency = cfg->spi_max_frequency;
data->spi_cfg.slave = cfg->spi_slave;

#if defined(DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER)
/* handle SPI CS thru GPIO if it is the case */

data->adxl372_cs_ctrl.gpio_dev = device_get_binding(cfg->gpio_cs_port);
@@ -932,9 +932,9 @@ static const struct adxl372_dev_config adxl372_config = {
.spi_port = DT_INST_0_ADI_ADXL372_BUS_NAME,
.spi_slave = DT_INST_0_ADI_ADXL372_BASE_ADDRESS,
.spi_max_frequency = DT_INST_0_ADI_ADXL372_SPI_MAX_FREQUENCY,
#ifdef DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER
.gpio_cs_port = DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL372_CS_GPIO_PIN,
#ifdef DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER
.gpio_cs_port = DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER,
.cs_gpio = DT_INST_0_ADI_ADXL372_CS_GPIOS_PIN,
#endif
#endif
#ifdef CONFIG_ADXL372_TRIGGER
@@ -282,7 +282,7 @@ struct adxl372_data {
struct device *bus;
#ifdef CONFIG_ADXL372_SPI
struct spi_config spi_cfg;
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER)
struct spi_cs_control adxl372_cs_ctrl;
#endif
#endif
@@ -318,7 +318,7 @@ struct adxl372_dev_config {
const char *spi_port;
u16_t spi_slave;
u32_t spi_max_frequency;
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIO_CONTROLLER)
#if defined(DT_INST_0_ADI_ADXL372_CS_GPIOS_CONTROLLER)
const char *gpio_cs_port;
u8_t cs_gpio;
#endif

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