From b4a8a0ba11d5e83d74e63f5f7e3bb5bf051dd68f Mon Sep 17 00:00:00 2001
From: Charles Dias <charlesdias.cd@outlook.com>
Date: Sun, 12 Nov 2023 12:33:57 -0300
Subject: [PATCH] dts: arm: st: h7: add support for stm32h7b0

Add device tree support for STM32H7B0 line.

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
---
 dts/arm/st/h7/stm32h7b0.dtsi   | 27 +++++++++++++++++++++++++++
 dts/arm/st/h7/stm32h7b0Xb.dtsi | 17 +++++++++++++++++
 dts/arm/st/h7/stm32h7b3.dtsi   | 14 ++------------
 3 files changed, 46 insertions(+), 12 deletions(-)
 create mode 100644 dts/arm/st/h7/stm32h7b0.dtsi
 create mode 100644 dts/arm/st/h7/stm32h7b0Xb.dtsi

diff --git a/dts/arm/st/h7/stm32h7b0.dtsi b/dts/arm/st/h7/stm32h7b0.dtsi
new file mode 100644
index 00000000000000..043c3fee302f09
--- /dev/null
+++ b/dts/arm/st/h7/stm32h7b0.dtsi
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2023 Charles Dias <charlesdias.cd@outlook.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <st/h7/stm32h7a3.dtsi>
+
+/*
+ * STM32H7B0 line contains the same peripherals as STM32H7A3,
+ * with addition of CRYPTO/HASH and OTFDEC peripherals.
+ */
+/ {
+	soc {
+		compatible = "st,stm32h7b0", "st,stm32h7", "simple-bus";
+
+		cryp: cryp@48021000 {
+			compatible = "st,stm32-cryp";
+			reg = <0x48021000 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
+			interrupts = <79 0>;
+			interrupt-names = "cryp";
+			status = "disabled";
+		};
+	};
+};
diff --git a/dts/arm/st/h7/stm32h7b0Xb.dtsi b/dts/arm/st/h7/stm32h7b0Xb.dtsi
new file mode 100644
index 00000000000000..884e22edc8e928
--- /dev/null
+++ b/dts/arm/st/h7/stm32h7b0Xb.dtsi
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2023 Charles Dias <charlesdias.cd@outlook.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <st/h7/stm32h7b0.dtsi>
+/ {
+	soc {
+		flash-controller@52002000 {
+			flash0: flash@8000000 {
+				reg = <0x08000000 DT_SIZE_K(128)>;
+			};
+		};
+	};
+};
diff --git a/dts/arm/st/h7/stm32h7b3.dtsi b/dts/arm/st/h7/stm32h7b3.dtsi
index a104f58a192bd5..f8b583b9d751ee 100644
--- a/dts/arm/st/h7/stm32h7b3.dtsi
+++ b/dts/arm/st/h7/stm32h7b3.dtsi
@@ -5,23 +5,13 @@
  */
 
 #include <mem.h>
-#include <st/h7/stm32h7a3.dtsi>
+#include <st/h7/stm32h7b0.dtsi>
 
 /*
- * STM32H7B3 line contains the same peripherals as STM32H7A3,
- * with addition of CRYPTO/HASH and OTFDEC peripherals
+ * STM32H7B3 line contains the same peripherals as STM32H7B0.
  */
 / {
 	soc {
 		compatible = "st,stm32h7b3", "st,stm32h7", "simple-bus";
-
-		cryp: cryp@48021000 {
-			compatible = "st,stm32-cryp";
-			reg = <0x48021000 0x400>;
-			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
-			interrupts = <79 0>;
-			interrupt-names = "cryp";
-			status = "disabled";
-		};
 	};
 };