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boards/x86/up_squared: move UART configuration to apollo_lake.dtsi

The UARTs are on the SoC, not the board, so move their descriptors
to the SoC-level. Also turn on auto IRQ detection as these are PCI-
attached and their IRQs are subject to change depending upon firmware
settings.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
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Charles E. Youse authored and nashif committed May 2, 2019
1 parent 869c5d2 commit b5eba0f6bb63129d184ed20436d2fe11e6bbce35
@@ -30,35 +30,6 @@
};

soc {
uart0: uart@0 {
compatible = "ns16550";

pcie;
reg = <PCIE_BDF(0,0x18,0) PCIE_ID(0x8086,0x5abc)>;

label = "UART_0";
clock-frequency = <1843200>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
status = "ok";
current-speed = <115200>;
};

uart1: uart@1 {
compatible = "ns16550";

pcie;
reg = <PCIE_BDF(0,0x18,1) PCIE_ID(0x8086,0x5abe)>;

label = "UART_1";
clock-frequency = <1843200>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;

status = "ok";
current-speed = <115200>;
};

i2c0: i2c@91534000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -165,6 +136,14 @@
};
};

&uart0 {
status = "ok";
};

&uart1 {
status = "ok";
};

&gpio {
status = "ok";
};
@@ -12,6 +12,3 @@ CONFIG_SERIAL=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_I2C=y
CONFIG_PCI=y
CONFIG_PCIE=y
CONFIG_PCI_ENUMERATION=y
@@ -29,30 +29,6 @@
};

soc {
uart0: uart@81434000 {
compatible = "ns16550";
reg = <0x81434000 0x1000>;
label = "UART_0";
clock-frequency = <1843200>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;

status = "ok";
current-speed = <115200>;
};

uart1: uart@81432000 {
compatible = "ns16550";
reg = <0x81432000 0x1000>;
label = "UART_1";
clock-frequency = <1843200>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;

status = "ok";
current-speed = <115200>;
};

i2c0: i2c@81444000 {
compatible = "snps,designware-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -159,6 +135,14 @@
};
};

&uart0 {
status = "ok";
};

&uart1 {
status = "ok";
};

&gpio {
status = "ok";
};
@@ -6,6 +6,7 @@

#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/intel-ioapic.h>
#include <dt-bindings/pcie/pcie.h>

/ {
cpus {
@@ -44,6 +45,65 @@
compatible = "simple-bus";
ranges;

uart0: uart@0 {
compatible = "ns16550";

pcie;
reg = <PCIE_BDF(0,0x18,0) PCIE_ID(0x8086,0x5abc)>;

label = "UART_0";
clock-frequency = <1843200>;
interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;
status = "disabled";
current-speed = <115200>;
};

uart1: uart@1 {
compatible = "ns16550";

pcie;
reg = <PCIE_BDF(0,0x18,1) PCIE_ID(0x8086,0x5abe)>;

label = "UART_1";
clock-frequency = <1843200>;
interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;

status = "disabled";
current-speed = <115200>;
};

uart2: uart@2 {
compatible = "ns16550";

pcie;
reg = <PCIE_BDF(0,0x18,2) PCIE_ID(0x8086,0x5ac0)>;

label = "UART_2";
clock-frequency = <1843200>;
interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;

status = "disabled";
current-speed = <115200>;
};

uart3: uart@3 {
compatible = "ns16550";

pcie;
reg = <PCIE_BDF(0,0x18,3) PCIE_ID(0x8086,0x5aee)>;

label = "UART_3";
clock-frequency = <1843200>;
interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>;
interrupt-parent = <&intc>;

status = "disabled";
current-speed = <115200>;
};

gpio: gpio@d0c50000 {
compatible = "intel,apl-gpio";
reg = <0xd0c50000 0x1000>,
@@ -9,3 +9,8 @@ config SOC_APOLLO_LAKE
select CPU_APOLLO_LAKE
select BOOTLOADER_UNKNOWN
select HAS_I2C_DW
select PCI
select PCI_ENUMERATION
select PCIE
select PCIE_MSI
select DYNAMIC_INTERRUPTS

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