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arch/x86: do not redefine MSR regs in crt0.S

The real-mode startup code is trivially changed to refer to MSR
definitions in include/arch/x86/msr.h, rather than its ad-hoc ones.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
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Charles E. Youse authored and nashif committed Jun 4, 2019
1 parent 0e166fa commit ba516e8ea80dcf112ece4ec0587e9ae6f35bb32a
Showing with 6 additions and 4 deletions.
  1. +3 −4 arch/x86/core/crt0.S
  2. +3 −0 include/arch/x86/msr.h
@@ -12,6 +12,7 @@
*/

#include <arch/x86/asm.h>
#include <arch/x86/msr.h>
#include <kernel_arch_data.h>
#include <arch/cpu.h>
#include <arch/x86/multiboot.h>
@@ -47,8 +48,6 @@

#define RM_CODE_SEG 0x8
#define RM_DATA_SEG 0x18
#define MSR_MTRR_DEF_TYPE 0x000002ff
#define MTRR_ENABLE 0x00000800
#define X86_CR0_PE 0x00000001
#define X86_CR0_WP 0x00010000
#define X86_CR4_PSE 0x00000010
@@ -82,9 +81,9 @@ start32:
mov $(X86_CR0_WP | X86_CR0_PE),%eax
mov %eax,%cr0

movl $MSR_MTRR_DEF_TYPE,%ecx
movl $X86_MTRR_DEF_TYPE_MSR,%ecx
rdmsr
or $MTRR_ENABLE,%eax
or $X86_MTRR_DEF_TYPE_MSR_ENABLE,%eax
wrmsr

mov $RM_DATA_SEG,%eax
@@ -102,7 +102,10 @@
#define X86_MC19_CTL2_MSR 0x0293
#define X86_MC20_CTL2_MSR 0x0294
#define X86_MC21_CTL2_MSR 0x0295

#define X86_MTRR_DEF_TYPE_MSR 0x02ff
#define X86_MTRR_DEF_TYPE_MSR_ENABLE BIT(11)

#define X86_FIXED_CTR0_MSR 0x0309
#define X86_FIXED_CTR1_MSR 0x030a
#define X86_FIXED_CTR2_MSR 0x030b

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