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This adds initial Cortex-R support for interrupts and context switching. Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
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# SPDX-License-Identifier: Apache-2.0 | ||
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zephyr_library() | ||
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zephyr_library_sources( | ||
vector_table.S | ||
reset.S | ||
fault.c | ||
reboot.c | ||
stacks.c | ||
) |
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# Kconfig - ARM Cortex-R platform configuration options | ||
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# | ||
# Copyright (c) 2018 Marvell | ||
# Copyright (c) 2018 Lexmark International, Inc. | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
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# NOTE: We have the specific core implementations first and outside of the | ||
# if CPU_CORTEX_R block so that SoCs can select which core they are using | ||
# without having to select all the options related to that core. Everything | ||
# else is captured inside the if CPU_CORTEX_R block so they are not exposed | ||
# if one selects a different ARM Cortex Family (Cortex-A or Cortex-M) | ||
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if CPU_CORTEX_R | ||
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config ARMV7_R | ||
bool | ||
select ATOMIC_OPERATIONS_BUILTIN | ||
select ISA_ARM | ||
help | ||
This option signifies the use of an ARMv7-R processor | ||
implementation. | ||
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From https://developer.arm.com/products/architecture/cpu-architecture/r-profile: | ||
The Armv7-R architecture implements a traditional Arm architecture with | ||
multiple modes and supports a Protected Memory System Architecture | ||
(PMSA) based on a Memory Protection Unit (MPU). It supports the Arm (32) | ||
and Thumb (T32) instruction sets. | ||
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config ARMV7_R_FP | ||
bool | ||
depends on ARMV7_R | ||
help | ||
This option signifies the use of an ARMv7-R processor | ||
implementation supporting the Floating-Point Extension. | ||
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config ARMV7_EXCEPTION_STACK_SIZE | ||
int "Undefined Instruction and Abort stack size (in bytes)" | ||
default 256 | ||
help | ||
This option specifies the size of the stack used by the undefined | ||
instruction and data abort exception handlers. | ||
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config ARMV7_FIQ_STACK_SIZE | ||
int "FIQ stack size (in bytes)" | ||
default 256 | ||
help | ||
This option specifies the size of the stack used by the FIQ handler. | ||
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config ARMV7_SVC_STACK_SIZE | ||
int "SVC stack size (in bytes)" | ||
default 512 | ||
help | ||
This option specifies the size of the stack used by the SVC handler. | ||
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config ARMV7_SYS_STACK_SIZE | ||
int "SYS stack size (in bytes)" | ||
default 1024 | ||
help | ||
This option specifies the size of the stack used by the system mode. | ||
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menu "ARM Cortex-R options" | ||
depends on CPU_CORTEX_R | ||
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config RUNTIME_NMI | ||
default y | ||
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config LDREX_STREX_AVAILABLE | ||
default y | ||
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config GEN_ISR_TABLES | ||
default y | ||
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config GEN_IRQ_VECTOR_TABLE | ||
default n | ||
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endmenu | ||
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endif # CPU_CORTEX_R |
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/* | ||
* Copyright (c) 2018 Lexmark International, Inc. | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <kernel.h> | ||
#include <kernel_structs.h> | ||
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/** | ||
* | ||
* @brief Fault handler | ||
* | ||
* This routine is called when fatal error conditions are detected by hardware | ||
* and is responsible only for reporting the error. Once reported, it then | ||
* invokes the user provided routine _SysFatalErrorHandler() which is | ||
* responsible for implementing the error handling policy. | ||
* | ||
* This is a stub for more exception handling code to be added later. | ||
*/ | ||
void _Fault(z_arch_esf_t *esf, u32_t exc_return) | ||
{ | ||
z_arm_fatal_error(K_ERR_CPU_EXCEPTION, esf); | ||
} | ||
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void z_FaultInit(void) | ||
{ | ||
} |
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/* | ||
* Copyright (c) 2013-2014 Wind River Systems, Inc. | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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/** | ||
* @file | ||
* @brief ARM Cortex-R System Control Block interface | ||
*/ | ||
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#include <kernel.h> | ||
#include <arch/cpu.h> | ||
#include <misc/util.h> | ||
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/** | ||
* | ||
* @brief Reset the system | ||
* | ||
* This routine resets the processor. | ||
* | ||
* @return N/A | ||
*/ | ||
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void __weak sys_arch_reboot(int type) | ||
{ | ||
ARG_UNUSED(type); | ||
} |
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